[coreboot-gerrit] New patch to review for coreboot: util/checklist: Concatinate optional list to complete list
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Wed Aug 3 01:47:50 CEST 2016
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16037
-gerrit
commit 4ee45b84016b2a95f35fd1f965341ba3ff0c5f6f
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Tue Aug 2 12:26:44 2016 -0700
util/checklist: Concatinate optional list to complete list
Don't require that the routines in the .optional file be listed in the
.complete data file. Concatinate the two files when building the
complete symbol list.
TEST=Build and run on Galileo Gen2
Change-Id: I596134e1a19311d357aa0d93cfb33c7ca9801e2e
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
util/checklist/Makefile.inc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/util/checklist/Makefile.inc b/util/checklist/Makefile.inc
index f1dff5d..777f75e 100644
--- a/util/checklist/Makefile.inc
+++ b/util/checklist/Makefile.inc
@@ -98,11 +98,13 @@ ifeq ($(CONFIG_CREATE_BOARD_CHECKLIST),y)
#
%.expected: %.symbol_table
cp $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_complete.dat $@.tmp
+ cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/$(basename $(*F))_optional.dat >> $@.tmp
# If no separate verstage, combine verstage and romstage routines into a single list
if [ "$(*F)" = "romstage" ]; then \
if [ ! -e $(*D)/verstage.elf ]; then \
if [ ! -e $(*D)/postcar.elf ]; then \
cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_complete.dat >> $@.tmp; \
+ cat $(CONFIG_CHECKLIST_DATA_FILE_LOCATION)/verstage_optional.dat >> $@.tmp; \
fi; \
fi; \
fi
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