[coreboot-gerrit] Patch merged into coreboot/master: google/reef: Add pull up 20K for LPC SERIRQ
gerrit at coreboot.org
gerrit at coreboot.org
Tue Aug 2 18:41:17 CEST 2016
the following patch was just integrated into master:
commit 597614347561f7a72ad3f9750f74d99a5cfe978e
Author: Kane Chen <kane.chen at intel.com>
Date: Thu Jul 28 19:41:15 2016 +0800
google/reef: Add pull up 20K for LPC SERIRQ
per hw team's check and info from EDS, this pin needs to be pu 20K.
Otherwise SoC may not notice interrupt request from
EC over LPC because SERIRQ line is floating.
BUG=chrome-os-partner:55586
BRANCH=none
TEST=boot ok and Quanta factory verified the keyboard issue is gone
Signed-off-by: Kane Chen <kane.chen at intel.com>
Change-Id: I5b0213514ce152d4e2cecdda8786925495a0f24a
Reviewed-on: https://review.coreboot.org/15951
Tested-by: build bot (Jenkins)
Reviewed-by: Freddy Paul <freddy.paul at intel.com>
Reviewed-by: Andrey Petrov <andrey.petrov at intel.com>
See https://review.coreboot.org/15951 for details.
-gerrit
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