[coreboot-gerrit] New patch to review for coreboot: intel/skylake: Fix UART build options

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16025

-gerrit

commit 04cc80e342b6749b483372fb937b8ad0b4460d06
Author: Furquan Shaikh <furquan at google.com>
Date:   Mon Aug 1 19:37:38 2016 -0700

    intel/skylake: Fix UART build options
    
    1. skylake does not support UART over I/O. So, NO_UART_ON_SUPERIO needs
    to be selected by default.
    2. With NO_UART_ON_SUPERIO selected, uart_debug.c needs to be included
    unconditionally to prevent compilation failures.
    
    Change-Id: I4e996bea2a25b3b1dfb9625d97985a9d3473561b
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 src/soc/intel/skylake/Kconfig      |  1 +
 src/soc/intel/skylake/Makefile.inc | 10 +++++-----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index bbffd17..07b60d4 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
 	select MMCONF_SUPPORT_DEFAULT
 	select NO_FIXED_XIP_ROM_SIZE
 	select MRC_SETTINGS_PROTECT
+	select NO_UART_ON_SUPERIO
 	select PARALLEL_MP
 	select PCIEXP_ASPM
 	select PCIEXP_COMMON_CLOCK
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 8ef8ebd..2c891fa 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -21,9 +21,9 @@ bootblock-y += pch.c
 bootblock-y += pcr.c
 bootblock-y += pmutil.c
 bootblock-y += tsc_freq.c
-bootblock-$(CONFIG_UART_DEBUG) += uart_debug.c
+bootblock-y += uart_debug.c
 
-verstage-$(CONFIG_UART_DEBUG) += uart_debug.c
+verstage-y += uart_debug.c
 
 romstage-y += flash_controller.c
 romstage-y += gpio.c
@@ -35,7 +35,7 @@ romstage-y += pei_data.c
 romstage-y += pmutil.c
 romstage-y += smbus_common.c
 romstage-y += tsc_freq.c
-romstage-$(CONFIG_UART_DEBUG) += uart_debug.c
+romstage-y += uart_debug.c
 
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
 ramstage-y += chip.c
@@ -67,7 +67,7 @@ ramstage-y += smmrelocate.c
 ramstage-y += systemagent.c
 ramstage-y += tsc_freq.c
 ramstage-y += uart.c
-ramstage-$(CONFIG_UART_DEBUG) += uart_debug.c
+ramstage-y += uart_debug.c
 ramstage-y += vr_config.c
 ramstage-y += xhci.c
 
@@ -80,7 +80,7 @@ smm-y += pmutil.c
 smm-y += smihandler.c
 smm-$(CONFIG_SPI_FLASH_SMM) += flash_controller.c
 smm-y += tsc_freq.c
-smm-$(CONFIG_UART_DEBUG) += uart_debug.c
+smm-y += uart_debug.c
 
 # cpu_microcode_bins += ???