[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Add iosstate macros for GPIO
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com)
gerrit at coreboot.org
Mon Aug 1 21:39:29 CEST 2016
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15776
-gerrit
commit 3ff6bae8b28d675e41776002367d7a128d09bdd2
Author: Shankar, Vaibhav <vaibhav.shankar at intel.com>
Date: Wed Jul 13 14:00:08 2016 -0700
soc/intel/apollolake: Add iosstate macros for GPIO
IO Standby State (IOSSTATE): The I/O Standby State defines
which state the pad should be parked in when the I/O is in a
standby state. Iosstate set to 15 means IO-Standby is ignored
for this pin (same as functional mode), So that pin keeps on
functioning in S3/S0iX.
Change-Id: Ie51ff86a2ea63fa6535407fcc2df7a137ee43e8b
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Signed-off-by: Shankar, Vaibhav <vaibhav.shankar at intel.com>
---
src/soc/intel/apollolake/gpio.c | 11 ++++++++++-
src/soc/intel/apollolake/include/soc/gpio.h | 6 ++++++
src/soc/intel/apollolake/include/soc/gpio_defs.h | 22 ++++++++++++++++++++++
3 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index a3ffb3d..2d32525 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -85,10 +85,19 @@ static void gpio_configure_itss(const struct pad_config *cfg,
void gpio_configure_pad(const struct pad_config *cfg)
{
+ uint32_t dw1;
const struct pad_community *comm = gpio_get_community(cfg->pad);
uint16_t config_offset = PAD_CFG_OFFSET(cfg->pad - comm->first_pad);
+
+ /* Iostandby bits are tentatively stored in [3:0] bits (RO) of config1.
+ * dw1 is used to extract the bits of Iostandby.
+ * This is done to preserve config1 size as unit16 in gpio.h.
+ */
+ dw1 = cfg->config1 & ~PAD_CFG1_IOSSTATE_MASK;
+ dw1 |= (cfg->config1 & PAD_CFG1_IOSSTATE_MASK) << PAD_CFG1_IOSSTATE_SHIFT;
+
iosf_write(comm->port, config_offset, cfg->config0);
- iosf_write(comm->port, config_offset + sizeof(uint32_t), cfg->config1);
+ iosf_write(comm->port, config_offset + sizeof(uint32_t), dw1);
gpio_configure_itss(cfg, comm->port, config_offset);
}
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index 1ebac2d..56c2407 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -28,6 +28,7 @@ typedef uint32_t gpio_t;
#define PAD_FUNC(value) PAD_CFG0_MODE_##value
#define PAD_RESET(value) PAD_CFG0_RESET_##value
#define PAD_PULL(value) PAD_CFG1_PULL_##value
+#define PAD_IOSSTATE(value) PAD_CFG1_IOSSTATE_##value
#define PAD_IRQ_CFG(route, trig, inv) \
(PAD_CFG0_ROUTE_##route | \
PAD_CFG0_TRIG_##trig | \
@@ -44,6 +45,11 @@ typedef uint32_t gpio_t;
#define PAD_CFG_NF(pad, pull, rst, func) \
_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull))
+/* Native function configuration for standby state */
+#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate) \
+ _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), (PAD_PULL(pull) | \
+ PAD_IOSSTATE(iosstate)))
+
/* General purpose output, no pullup/down. */
#define PAD_CFG_GPO(pad, val, rst) \
_PAD_CFG_STRUCT(pad, \
diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h
index 48e08e7..c46f24a 100644
--- a/src/soc/intel/apollolake/include/soc/gpio_defs.h
+++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h
@@ -86,6 +86,28 @@
#define PAD_CFG1_PULL_UP_20K (0xc << 10)
#define PAD_CFG1_PULL_UP_667 (0xd << 10)
#define PAD_CFG1_PULL_NATIVE (0xf << 10)
+#define PAD_CFG1_IOSSTATE_IOSS0 (0x0 << 0) /* Tx enabled driving last value
+ driven, Rx enabled */
+#define PAD_CFG1_IOSSTATE_IOSS1 (0x1 << 0) /* Tx enabled driving 0, Rx disabled
+ and Rx driving 0 back to its controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS2 (0x2 << 0) /* Tx enabled driving 0, Rx disabled
+ and Rx driving 1 back to its controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS3 (0x3 << 0) /* Tx enabled driving 1, Rx disabled
+ and Rx driving 0 back to its controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS4 (0x4 << 0) /* Tx enabled driving 1, Rx disabled
+ and Rx driving 1 back to its controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS5 (0x5 << 0) /* Tx enabled driving 0,
+ Rx enabled */
+#define PAD_CFG1_IOSSTATE_IOSS6 (0x6 << 0) /* Tx enabled driving 1,
+ Rx enabled */
+#define PAD_CFG1_IOSSTATE_IOSS7 (0x7 << 0) /* Hi-Z, Rx driving 0 back to its
+ controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS8 (0x8 << 0) /* Hi-Z, Rx driving 1 back to its
+ controller internally */
+#define PAD_CFG1_IOSSTATE_IOSS9 (0x9 << 0) /* Tx disabled, Rx enabled */
+#define PAD_CFG1_IOSSTATE_IGNORE (0xf << 0) /* Ignore Iostandby */
+#define PAD_CFG1_IOSSTATE_MASK 0xf /* mask to extract Iostandby bits */
+#define PAD_CFG1_IOSSTATE_SHIFT 14 /* set Iostandby bits [17:14] */
#define PAD_CFG_BASE 0x500
#define PAD_CFG_OFFSET(pad) (PAD_CFG_BASE + ((pad) * 8))
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