[coreboot-gerrit] Patch set updated for coreboot: arch/x86: Enable postcar console
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Mon Aug 1 20:15:01 CEST 2016
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16001
-gerrit
commit 7efd4deebf9c5fa6702484dd4c9333e06e794748
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jul 31 11:53:28 2016 -0700
arch/x86: Enable postcar console
Add a Kconfig value to enable the console during postcar. Add a call
to console_init at the beginning of the postcar stage in exit_car.S.
TEST=Build and run on Galileo Gen2
Change-Id: I66e2ec83344129ede2c7d6e5627c8062e28f50ad
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/arch/x86/exit_car.S | 5 +++++
src/console/Kconfig | 7 +++++++
src/console/init.c | 2 +-
src/include/console/console.h | 3 ++-
4 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S
index a51d662..13c2390 100644
--- a/src/arch/x86/exit_car.S
+++ b/src/arch/x86/exit_car.S
@@ -26,6 +26,11 @@ stack_top:
.text
.global _start
_start:
+#if IS_ENABLED(CONFIG_POSTCAR_CONSOLE)
+ /* Enable the console */
+ call console_init
+#endif /* CONFIG_POSTCAR_CONSOLE */
+
/* chipset_teardown_car() is expected to disable cache-as-ram. */
call chipset_teardown_car
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 90fb426..e945c25 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -7,6 +7,13 @@ config BOOTBLOCK_CONSOLE
help
Use console during the bootblock if supported
+config POSTCAR_CONSOLE
+ bool "Enable console output during postcar."
+ depends on POSTCAR_STAGE
+ default n
+ help
+ Use console during the postcar if supported
+
config SQUELCH_EARLY_SMP
bool "Squelch AP CPUs from early console."
default y
diff --git a/src/console/init.c b/src/console/init.c
index 8f40abb..189079b 100644
--- a/src/console/init.c
+++ b/src/console/init.c
@@ -30,7 +30,7 @@ int console_log_level(int msg_level)
return (console_loglevel >= msg_level);
}
-void console_init(void)
+asmlinkage void console_init(void)
{
#if !defined(__PRE_RAM__)
console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
diff --git a/src/include/console/console.h b/src/include/console/console.h
index ddb5c052..dcd5fe9 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <rules.h>
+#include <arch/cpu.h>
#include <console/post_codes.h>
#include <commonlib/loglevel.h>
@@ -51,7 +52,7 @@ void __attribute__ ((noreturn)) die(const char *msg);
(ENV_SMM && CONFIG_DEBUG_SMI))
#if __CONSOLE_ENABLE__
-void console_init(void);
+asmlinkage void console_init(void);
int console_log_level(int msg_level);
int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
void do_putchar(unsigned char byte);
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