[coreboot-gerrit] Patch set updated for coreboot: soc/intel/quark: Fix car_stage_entry routine name.
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Mon Aug 1 02:53:08 CEST 2016
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15857
-gerrit
commit e0e18c6e0794a630638a89dda3610fde6a208acc
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Wed Jul 20 08:41:52 2016 -0700
soc/intel/quark: Fix car_stage_entry routine name.
Change routine name from car_state_entry to car_stage_entry.
TEST=Build and run on Galileo Gen2
Change-Id: Ifd11db3fa711f2fe52ade1c6cde94f9be1f3a652
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/soc/intel/quark/include/soc/romstage.h | 2 +-
src/soc/intel/quark/romstage/car_stage_entry.S | 2 +-
src/soc/intel/quark/romstage/romstage.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/soc/intel/quark/include/soc/romstage.h b/src/soc/intel/quark/include/soc/romstage.h
index 7d89c8b..7e761ab 100644
--- a/src/soc/intel/quark/include/soc/romstage.h
+++ b/src/soc/intel/quark/include/soc/romstage.h
@@ -25,7 +25,7 @@
#include <fsp/romstage.h>
#include <soc/reg_access.h>
-asmlinkage void *car_state_c_entry(void);
+asmlinkage void *car_stage_c_entry(void);
void report_platform_info(void);
int set_base_address_and_enable_uart(u8 bus, u8 dev, u8 func, u32 mmio_base);
void pcie_init(void);
diff --git a/src/soc/intel/quark/romstage/car_stage_entry.S b/src/soc/intel/quark/romstage/car_stage_entry.S
index bf51061..d0a0db0 100644
--- a/src/soc/intel/quark/romstage/car_stage_entry.S
+++ b/src/soc/intel/quark/romstage/car_stage_entry.S
@@ -27,7 +27,7 @@
car_stage_entry:
/* Enter the C code */
- call car_state_c_entry
+ call car_stage_c_entry
#if !ENV_VERSTAGE
#include "src/drivers/intel/fsp1_1/after_raminit.S"
diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c
index 457c922..4f9b698 100644
--- a/src/soc/intel/quark/romstage/romstage.c
+++ b/src/soc/intel/quark/romstage/romstage.c
@@ -66,7 +66,7 @@ static const struct reg_script hsuart_init[] = {
REG_SCRIPT_END
};
-asmlinkage void *car_state_c_entry(void)
+asmlinkage void *car_stage_c_entry(void)
{
post_code(0x20);
if (IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)) {
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