[coreboot-gerrit] New patch to review for coreboot: mainboard/intel/galileo: Enable I2C and GPIO

[Leroy P Leahy (leroy.p.leahy@intel.com)]

Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14558

-gerrit

commit 61173657ba3475fb033753c45d16028b40951e65
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sat Apr 30 09:07:14 2016 -0700

    mainboard/intel/galileo: Enable I2C and GPIO
    
    Enable the I2C and GPIO controllers
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I97bbbb7c5e72edbed14702a4129d9cfa977e1911
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/mainboard/intel/galileo/devicetree.cb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/intel/galileo/devicetree.cb b/src/mainboard/intel/galileo/devicetree.cb
index 05edffc..66d32a8 100644
--- a/src/mainboard/intel/galileo/devicetree.cb
+++ b/src/mainboard/intel/galileo/devicetree.cb
@@ -39,7 +39,7 @@ chip soc/intel/quark
 		device pci 14.7 off end	# 8086 0937 - 10/100 Ethernet MAC 1
 		device pci 15.0 on end	# 8086 0935 - SPI controller 0
 		device pci 15.1 on end	# 8086 0935 - SPI controller 1
-		device pci 15.2 off end	# 8086 0934 - I2C/GPIO controller
+		device pci 15.2 on end	# 8086 0934 - I2C/GPIO controller
 		device pci 17.0 on end	# 8086 11C3 - PCIe Root Port 0
 		device pci 17.1 off end	# 8086 11C4 - PCIe Root Port 1
 		device pci 1f.0 on end	# 8086 095E - Legacy Bridge