[coreboot-gerrit] New patch to review for coreboot: lib/reg_script: Add display support
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Sat Apr 30 02:53:59 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14553
-gerrit
commit c36e25b0a6af0b72151bf415377046c082ac0099
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Fri Apr 29 15:07:19 2016 -0700
lib/reg_script: Add display support
Add the ability to enable the display of the script.
TEST=Build and run on Galileo Gen2
Change-Id: If0d4d61ed8ef48ec20082b327f358fd1987e3fb9
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/include/reg_script.h | 14 ++++++
src/lib/reg_script.c | 111 ++++++++++++++++++++++++++++++++++++++++++-----
2 files changed, 114 insertions(+), 11 deletions(-)
diff --git a/src/include/reg_script.h b/src/include/reg_script.h
index 741641a..639c4fe 100644
--- a/src/include/reg_script.h
+++ b/src/include/reg_script.h
@@ -48,6 +48,8 @@ enum {
REG_SCRIPT_COMMAND_SET_DEV,
REG_SCRIPT_COMMAND_NEXT,
REG_SCRIPT_COMMAND_END,
+ REG_SCRIPT_COMMAND_DISPLAY_ON,
+ REG_SCRIPT_COMMAND_DISPLAY_OFF,
};
enum {
@@ -130,6 +132,17 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
.res_index = res_index_, \
}
+/* Display control */
+#define REG_SCRIPT_DISPLAY_REGISTER 0x00000002
+#define REG_SCRIPT_DISPLAY_VALUE 0x00000001
+
+#define REG_SCRIPT_DISPLAY_OFF \
+ _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_DISPLAY_OFF, \
+ REG_SCRIPT_TYPE_PCI, 0, 0, 0, 0, 0, 0)
+#define REG_SCRIPT_DISPLAY_ON \
+ _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_DISPLAY_ON, \
+ REG_SCRIPT_TYPE_PCI, 0, 0, 0, 0, 0, 0)
+
/*
* PCI
*/
@@ -414,5 +427,6 @@ IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL)
void reg_script_run(const struct reg_script *script);
void reg_script_run_on_dev(device_t dev, const struct reg_script *step);
+extern uint8_t reg_script_display;
#endif /* REG_SCRIPT_H */
diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index 7530dc3..cf756ec 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -40,6 +40,8 @@
#define EMPTY_DEV NULL
#endif
+uint8_t reg_script_display;
+
static inline void reg_script_set_dev(struct reg_script_context *ctx,
device_t dev)
{
@@ -425,22 +427,42 @@ static const struct reg_script_bus_entry
static uint64_t reg_script_read(struct reg_script_context *ctx)
{
+ uint8_t display = reg_script_display;
const struct reg_script *step = reg_script_get_step(ctx);
+ uint64_t value = 0;
switch (step->type) {
case REG_SCRIPT_TYPE_PCI:
- return reg_script_read_pci(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "PCI: ");
+ value = reg_script_read_pci(ctx);
+ break;
case REG_SCRIPT_TYPE_IO:
- return reg_script_read_io(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "IO: ");
+ value = reg_script_read_io(ctx);
+ break;
case REG_SCRIPT_TYPE_MMIO:
- return reg_script_read_mmio(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "MMIO: ");
+ value = reg_script_read_mmio(ctx);
+ break;
case REG_SCRIPT_TYPE_RES:
- return reg_script_read_res(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "RES: ");
+ value = reg_script_read_res(ctx);
+ break;
case REG_SCRIPT_TYPE_MSR:
- return reg_script_read_msr(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "MSR: ");
+ value = reg_script_read_msr(ctx);
+ break;
#if HAS_IOSF
case REG_SCRIPT_TYPE_IOSF:
- return reg_script_read_iosf(ctx);
+ if (reg_script_display)
+ printk(BIOS_INFO, "IOSF: ");
+ value = reg_script_read_iosf(ctx);
+ break;
#endif /* HAS_IOSF */
default:
#ifndef __PRE_RAM__
@@ -450,39 +472,74 @@ static uint64_t reg_script_read(struct reg_script_context *ctx)
/* Read from the platform specific bus */
bus = find_bus(step);
if (NULL != bus)
- return bus->reg_script_read(ctx);
+ value = bus->reg_script_read(ctx);
+ break;
}
#endif
printk(BIOS_ERR,
"Unsupported read type (0x%x) for this device!\n",
step->type);
- break;
+ return 0;
}
- return 0;
+ if (reg_script_display) {
+ if (reg_script_display & REG_SCRIPT_DISPLAY_REGISTER)
+ printk(BIOS_INFO, "0x%08x --> ", step->reg);
+ if (reg_script_display & REG_SCRIPT_DISPLAY_VALUE)
+ switch (step->size) {
+ case REG_SCRIPT_SIZE_8:
+ printk(BIOS_INFO, "0x%02x\n", (uint8_t)value);
+ break;
+ case REG_SCRIPT_SIZE_16:
+ printk(BIOS_INFO, "0x%04x\n", (int16_t)value);
+ break;
+ case REG_SCRIPT_SIZE_32:
+ printk(BIOS_INFO, "0x%08x\n", (uint32_t)value);
+ break;
+ default:
+ printk(BIOS_INFO, "0x%016llx\n", value);
+ break;
+ }
+ }
+ reg_script_display = display;
+ return value;
}
static void reg_script_write(struct reg_script_context *ctx)
{
+ uint8_t display = reg_script_display;
const struct reg_script *step = reg_script_get_step(ctx);
+ uint64_t value;
switch (step->type) {
case REG_SCRIPT_TYPE_PCI:
+ if (reg_script_display)
+ printk(BIOS_INFO, "PCI: ");
reg_script_write_pci(ctx);
break;
case REG_SCRIPT_TYPE_IO:
+ if (reg_script_display)
+ printk(BIOS_INFO, "IO: ");
reg_script_write_io(ctx);
break;
case REG_SCRIPT_TYPE_MMIO:
+ if (reg_script_display)
+ printk(BIOS_INFO, "MMIO: ");
reg_script_write_mmio(ctx);
break;
case REG_SCRIPT_TYPE_RES:
+ if (reg_script_display)
+ printk(BIOS_INFO, "RES: ");
reg_script_write_res(ctx);
break;
case REG_SCRIPT_TYPE_MSR:
+ if (reg_script_display)
+ printk(BIOS_INFO, "MSR: ");
reg_script_write_msr(ctx);
break;
#if HAS_IOSF
case REG_SCRIPT_TYPE_IOSF:
+ if (reg_script_display)
+ printk(BIOS_INFO, "IOSF: ");
reg_script_write_iosf(ctx);
break;
#endif /* HAS_IOSF */
@@ -495,15 +552,36 @@ static void reg_script_write(struct reg_script_context *ctx)
bus = find_bus(step);
if (NULL != bus) {
bus->reg_script_write(ctx);
- return;
+ break;
}
}
#endif
printk(BIOS_ERR,
"Unsupported write type (0x%x) for this device!\n",
step->type);
- break;
+ return;
}
+ if (reg_script_display) {
+ if (reg_script_display & REG_SCRIPT_DISPLAY_REGISTER)
+ printk(BIOS_INFO, "0x%08x <-- ", step->reg);
+ value = step->value;
+ if (reg_script_display & REG_SCRIPT_DISPLAY_VALUE)
+ switch (step->size) {
+ case REG_SCRIPT_SIZE_8:
+ printk(BIOS_INFO, "0x%02x\n", (uint8_t)value);
+ break;
+ case REG_SCRIPT_SIZE_16:
+ printk(BIOS_INFO, "0x%04x\n", (uint16_t)value);
+ break;
+ case REG_SCRIPT_SIZE_32:
+ printk(BIOS_INFO, "0x%08x\n", (uint32_t)value);
+ break;
+ default:
+ printk(BIOS_INFO, "0x%016llx\n", value);
+ break;
+ }
+ }
+ reg_script_display = display;
}
static void reg_script_rmw(struct reg_script_context *ctx)
@@ -601,6 +679,14 @@ static void reg_script_run_step(struct reg_script_context *ctx,
case REG_SCRIPT_COMMAND_NEXT:
reg_script_run_next(ctx, step->next);
break;
+ case REG_SCRIPT_COMMAND_DISPLAY_ON:
+ reg_script_display = REG_SCRIPT_DISPLAY_REGISTER
+ | REG_SCRIPT_DISPLAY_VALUE;
+ break;
+ case REG_SCRIPT_COMMAND_DISPLAY_OFF:
+ reg_script_display = 0;
+ break;
+
default:
printk(BIOS_WARNING, "Invalid command: %08x\n",
step->command);
@@ -619,6 +705,9 @@ static void reg_script_run_with_context(struct reg_script_context *ctx)
reg_script_run_step(ctx, step);
reg_script_set_step(ctx, step + 1);
}
+
+ /* Turn off the display at the end of the script */
+ reg_script_display = 0;
}
static void reg_script_run_next(struct reg_script_context *prev_ctx,
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