[coreboot-gerrit] New patch to review for coreboot: x86/memlayout.h: Do not include data/bss sections in C_ENVIRONMENT_BOOTBLOCK

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14533

-gerrit

commit 3f215117fe847eb5e9f5a32c45332be2065e5ae5
Author: Furquan Shaikh <furquan at google.com>
Date:   Wed Apr 27 22:06:47 2016 -0700

    x86/memlayout.h: Do not include data/bss sections in C_ENVIRONMENT_BOOTBLOCK
    
    C_ENVIRONMENT_BOOTBLOCK on x86 is like romstage and uses cache-as-ram
    separately. It does not use any data/bss sections.
    
    Change-Id: I8957f467f01e754fa2d95783466a01daa6c4e51a
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 src/arch/x86/include/arch/memlayout.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
index 451feb9..840ceb0 100644
--- a/src/arch/x86/include/arch/memlayout.h
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -18,7 +18,7 @@
 
 #include <rules.h>
 
-#if ENV_ROMSTAGE || ENV_VERSTAGE
+#if ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_VERSTAGE
 /* No .data or .bss sections. Cache as ram is handled separately. */
 #define ARCH_STAGE_HAS_DATA_SECTION 0
 #define ARCH_STAGE_HAS_BSS_SECTION 0