[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/apollolake: Enable LPC bus interface

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit e976bd44692d2adb320a1256f1b6bfaa6469108a
Author: Andrey Petrov <andrey.petrov at intel.com>
Date:   Fri Feb 5 11:27:44 2016 -0800

    soc/intel/apollolake: Enable LPC bus interface
    
    This adds early LPC setup in bootblock (for Chrome EC) as well as
    late (ramstage) IO decode/sirq enable.
    
    Change-Id: Ic270e66dbf07240229d4783f80e2ec02007c36c2
    Signed-off-by: Divya Sasidharan <divya.s.sasidharan at intel.com>
    Signed-off-by: Freddy Paul <freddy.paul at intel.com>
    Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
    Reviewed-on: https://review.coreboot.org/14469
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/14469 for details.

-gerrit