[coreboot-gerrit] New patch to review for coreboot: nb/amd/mct_ddr3: Only initialize ECC bits once

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14503

-gerrit

commit 22a49883583f57dfd9f0f801c0a983ba36a4994c
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Sun Apr 24 20:56:31 2016 -0500

    nb/amd/mct_ddr3: Only initialize ECC bits once
    
    The ECC check bits of all ECC DIMMS were inadvertently initialized
    twice in the same routine, significantly delaying startup.  Part
    of this was related to an obsolete MCA workaround that has been
    fixed through multiple commits, therefore the workaround is no
    longer needed.
    
    Only initialize the ECC check bits once.
    
    Change-Id: I90ac1147d9b006794d29b866a9cb5b7ead8f01e7
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
index abf40a1..c0ae440 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2010 Advanced Micro Devices, Inc.
- * Copyright (C) 2015 Timothy Pearson <tpearson at raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -137,10 +137,6 @@ u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA)
 			/* Clear MC4 error status */
 			pci_write_config32(pDCTstat->dev_nbmisc, 0x48, 0x0);
 			pci_write_config32(pDCTstat->dev_nbmisc, 0x4c, 0x0);
-
-			/* Clear the RAM before enabling ECC to prevent MCE-related lockups */
-			DCTMemClr_Init_D(pMCTstat, pDCTstat);
-			DCTMemClr_Sync_D(pMCTstat, pDCTstat);
 		}
 	}