[coreboot-gerrit] Patch set updated for coreboot: mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage

Timothy Pearson (tpearson@raptorengineeringinc.com) gerrit at coreboot.org
Mon Apr 25 03:38:46 CEST 2016


Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14502

-gerrit

commit 9e77dba0329372fbf688113d8948e2766a839eac
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Sun Apr 24 20:33:29 2016 -0500

    mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
    
    The existing memory test routine was insufficient to detect certain types
    of bus instability related to multiple incompatible RDIMMs on one channel.
    
    Add a PRNG second stage test to the memory test routine.  This second stage
    test reliably detects faults in memory setup for RDIMM configurations that
    also fail under the proprietary BIOS.
    
    Change-Id: I44721447ce4c2b728d4a8f328ad1a3eb8f324d3d
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/mainboard/asus/kcma-d8/romstage.c  | 62 ++++++++++++++++++++++++++++++----
 src/mainboard/asus/kgpe-d16/romstage.c | 62 ++++++++++++++++++++++++++++++----
 2 files changed, 110 insertions(+), 14 deletions(-)

diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index c217ff3..9d1d95f 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015 Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
  *
  * Copyright (C) 2007 AMD
  * Written by Yinghai Lu <yinghailu at amd.com> for AMD.
@@ -246,28 +246,76 @@ static void execute_memory_test(void)
 {
 	/* Test DRAM functionality */
 	uint32_t i;
+	uint32_t v;
+	uint32_t w;
+	uint32_t x;
+	uint32_t y;
+	uint32_t z;
 	uint32_t* dataptr;
-	printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+	uint32_t readback;
+	uint32_t start = 0x300000;
+	printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
 	for (i=0; i < 0x1000000; i = i + 8) {
-		dataptr = (void *)(0x300000 + i);
+		dataptr = (void *)(start + i);
 		*dataptr = 0x55555555;
-		dataptr = (void *)(0x300000 + i + 4);
+		dataptr = (void *)(start + i + 4);
 		*dataptr = 0xaaaaaaaa;
 	}
 	printk(BIOS_DEBUG, "Done!\n");
 	printk(BIOS_DEBUG, "Testing memory...\n");
-	uint32_t readback;
 	for (i=0; i < 0x1000000; i = i + 8) {
-		dataptr = (void *)(0x300000 + i);
+		dataptr = (void *)(start + i);
 		readback = *dataptr;
 		if (readback != 0x55555555)
 			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
-		dataptr = (void *)(0x300000 + i + 4);
+		dataptr = (void *)(start + i + 4);
 		readback = *dataptr;
 		if (readback != 0xaaaaaaaa)
 			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
 	}
 	printk(BIOS_DEBUG, "Done!\n");
+	printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+	/* Set up the PRNG seeds for initial write */
+	w = 0x55555555;
+	x = 0xaaaaaaaa;
+	y = 0x12345678;
+	z = 0x87654321;
+	for (i=0; i < 0x1000000; i = i + 4) {
+		/* Use Xorshift as a PRNG to stress test the bus */
+		v = x;
+		v ^= v << 11;
+		v ^= v >> 8;
+		x = y;
+		y = z;
+		z = w;
+		w ^= w >> 19;
+		w ^= v;
+		dataptr = (void *)(start + i);
+		*dataptr = w;
+	}
+	printk(BIOS_DEBUG, "Done!\n");
+	printk(BIOS_DEBUG, "Testing memory...\n");
+	/* Reset the PRNG seeds for readback */
+	w = 0x55555555;
+	x = 0xaaaaaaaa;
+	y = 0x12345678;
+	z = 0x87654321;
+	for (i=0; i < 0x1000000; i = i + 4) {
+		/* Use Xorshift as a PRNG to stress test the bus */
+		v = x;
+		v ^= v << 11;
+		v ^= v >> 8;
+		x = y;
+		y = z;
+		z = w;
+		w ^= w >> 19;
+		w ^= v;
+		dataptr = (void *)(start + i);
+		readback = *dataptr;
+		if (readback != w)
+			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+	}
+	printk(BIOS_DEBUG, "Done!\n");
 }
 #endif
 
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index e6bd91c..5a7400e 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015 Timothy Pearson <tpearson at raptorengineeringinc.com>, Raptor Engineering
+ * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
  *
  * Copyright (C) 2007 AMD
  * Written by Yinghai Lu <yinghailu at amd.com> for AMD.
@@ -287,28 +287,76 @@ static void execute_memory_test(void)
 {
 	/* Test DRAM functionality */
 	uint32_t i;
+	uint32_t v;
+	uint32_t w;
+	uint32_t x;
+	uint32_t y;
+	uint32_t z;
 	uint32_t* dataptr;
-	printk(BIOS_DEBUG, "Writing test patterns to memory...\n");
+	uint32_t readback;
+	uint32_t start = 0x300000;
+	printk(BIOS_DEBUG, "Writing test pattern 1 to memory...\n");
 	for (i=0; i < 0x1000000; i = i + 8) {
-		dataptr = (void *)(0x300000 + i);
+		dataptr = (void *)(start + i);
 		*dataptr = 0x55555555;
-		dataptr = (void *)(0x300000 + i + 4);
+		dataptr = (void *)(start + i + 4);
 		*dataptr = 0xaaaaaaaa;
 	}
 	printk(BIOS_DEBUG, "Done!\n");
 	printk(BIOS_DEBUG, "Testing memory...\n");
-	uint32_t readback;
 	for (i=0; i < 0x1000000; i = i + 8) {
-		dataptr = (void *)(0x300000 + i);
+		dataptr = (void *)(start + i);
 		readback = *dataptr;
 		if (readback != 0x55555555)
 			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0x55555555);
-		dataptr = (void *)(0x300000 + i + 4);
+		dataptr = (void *)(start + i + 4);
 		readback = *dataptr;
 		if (readback != 0xaaaaaaaa)
 			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, 0xaaaaaaaa);
 	}
 	printk(BIOS_DEBUG, "Done!\n");
+	printk(BIOS_DEBUG, "Writing test pattern 2 to memory...\n");
+	/* Set up the PRNG seeds for initial write */
+	w = 0x55555555;
+	x = 0xaaaaaaaa;
+	y = 0x12345678;
+	z = 0x87654321;
+	for (i=0; i < 0x1000000; i = i + 4) {
+		/* Use Xorshift as a PRNG to stress test the bus */
+		v = x;
+		v ^= v << 11;
+		v ^= v >> 8;
+		x = y;
+		y = z;
+		z = w;
+		w ^= w >> 19;
+		w ^= v;
+		dataptr = (void *)(start + i);
+		*dataptr = w;
+	}
+	printk(BIOS_DEBUG, "Done!\n");
+	printk(BIOS_DEBUG, "Testing memory...\n");
+	/* Reset the PRNG seeds for readback */
+	w = 0x55555555;
+	x = 0xaaaaaaaa;
+	y = 0x12345678;
+	z = 0x87654321;
+	for (i=0; i < 0x1000000; i = i + 4) {
+		/* Use Xorshift as a PRNG to stress test the bus */
+		v = x;
+		v ^= v << 11;
+		v ^= v >> 8;
+		x = y;
+		y = z;
+		z = w;
+		w ^= w >> 19;
+		w ^= v;
+		dataptr = (void *)(start + i);
+		readback = *dataptr;
+		if (readback != w)
+			printk(BIOS_DEBUG, "%p: INCORRECT VALUE %08x (should have been %08x)\n", dataptr, readback, w);
+	}
+	printk(BIOS_DEBUG, "Done!\n");
 }
 #endif
 



More information about the coreboot-gerrit mailing list