[coreboot-gerrit] Patch merged into coreboot/master: nb/amd/mct_ddr3: Run fence training on each node after memory clock change
gerrit at coreboot.org
gerrit at coreboot.org
Fri Apr 22 17:29:10 CEST 2016
the following patch was just integrated into master:
commit b474afdd2118baa6e132f8c756d74cb3be6df071
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Thu Apr 21 01:08:01 2016 -0500
nb/amd/mct_ddr3: Run fence training on each node after memory clock change
The BKDG requires phy fences to be re-trained after a memory clock change.
Memory training on the ASUS KGPE-D16 and KCMA-D8 somehow "mostly" worked
-- without actually following this requirement -- !
Fix the single typo that caused several weeks of delay in putting
servers with Kingston RAM (and others) into production...
Tested-On: ASUS KGPE-D16
Config-CPU: 1x Opteron 6262HE
Config-RAM: 4x Crucial 36KSF1G72PZ-1G6M1
Change-Id: I197e6728d2b0ac8c1535740599459d080b17af33
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14445
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply at raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/14445 for details.
-gerrit
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