[coreboot-gerrit] Patch set updated for coreboot: mainboard/amenia: Enable LPC IO decodes
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Fri Apr 22 16:02:13 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14470
-gerrit
commit 84b1ba9bbfe048d23a69627ae1d99df193ccc1f3
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Thu Apr 21 20:07:09 2016 -0700
mainboard/amenia: Enable LPC IO decodes
Change-Id: I3b278fc458b551b9bed2f53aa8089a55c84edf5a
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/mainboard/intel/amenia/mainboard.c | 29 ++++++++++++++++++++++++-
src/soc/intel/apollolake/include/soc/pci_devs.h | 2 ++
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/intel/amenia/mainboard.c b/src/mainboard/intel/amenia/mainboard.c
index 9949061..42ea07d 100644
--- a/src/mainboard/intel/amenia/mainboard.c
+++ b/src/mainboard/intel/amenia/mainboard.c
@@ -15,8 +15,16 @@
* GNU General Public License for more details.
*/
+#include <device/pci.h>
#include <device/device.h>
#include <soc/gpio.h>
+<<<<<<< HEAD
+=======
+#include <soc/lpc.h>
+#include "ec.h"
+#include <soc/intel/apollolake/chip.h>
+#include <soc/pci_devs.h>
+>>>>>>> 2d47cbb... mainboard/amenia: Enable LPC IO decodes
/* TODO: Move GPIO config to its own file once we get more GPIOs in the list */
static const struct pad_config amenia_gpios[] = {
@@ -133,11 +141,30 @@ static const struct pad_config amenia_gpios[] = {
};
+static void lpc_decode_enable(void *chip_info)
+{
+ uint16_t lpc_en;
+ const struct soc_intel_apollolake_config *config = chip_info;
+
+ /* IO Decode Enable */
+ lpc_en = GAMEL_LPC_EN | KBC_LPC_EN | MC_LPC_EN;
+ pci_write_config16(LPC_DEV, LPC_EN, lpc_en);
+
+ /*
+ * Set in PCI generic decode range registers.
+ * EC host command range is in 0x800-0x9ff.
+ */
+ pci_write_config32(LPC_DEV, LPC_GEN1_DEC, config->gen1_dec);
+ pci_write_config32(LPC_DEV, LPC_GEN2_DEC, config->gen2_dec);
+}
+
static void mainboard_init(void *chip_info)
{
gpio_configure_pads(amenia_gpios, ARRAY_SIZE(amenia_gpios));
+ lpc_decode_enable(chip_info);
+ mainboard_ec_init();
}
struct chip_operations mainboard_ops = {
- .init = mainboard_init,
+ .init = mainboard_init
};
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h
index 7b8caaf..0936428 100644
--- a/src/soc/intel/apollolake/include/soc/pci_devs.h
+++ b/src/soc/intel/apollolake/include/soc/pci_devs.h
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#define _NB_DEV(slot) dev_find_slot(0, _NB_DEVFN(slot))
#define _LPSS_PCI_DEV(slot, func) dev_find_slot(0, _LPSS_PCI_DEVFN(slot, func))
+#define PCI_DEV(bus, slot, func) dev_find_slot(0, PCI_DEVFN(slot, func))
#else
#include <arch/io.h>
#define _NB_DEV(slot) PCI_DEV(0, NB_DEV_SLOT_ ## slot, 0)
@@ -51,5 +52,6 @@
#define P2SB_DEV PCI_DEV(0, 0xd, 0)
#define PMC_DEV PCI_DEV(0, 0xd, 1)
#define SPI_DEV PCI_DEV(0, 0xd, 2)
+#define LPC_DEV PCI_DEV(0, 0x1f, 0)
#endif
More information about the coreboot-gerrit
mailing list