[coreboot-gerrit] New patch to review for coreboot: mainboard/amenia: Add GPIO setup for TPM in bootblock

[Andrey Petrov (andrey.petrov@intel.com)]

Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14467

-gerrit

commit 372d6e48b7b48c6325b881cdf512978a7150b04b
Author: Andrey Petrov <andrey.petrov at intel.com>
Date:   Mon Apr 18 13:36:19 2016 -0700

    mainboard/amenia: Add GPIO setup for TPM in bootblock
    
    Change-Id: Ib5bf4c759adf9656f7b34540d4fc924945d27a97
    Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
 src/mainboard/intel/amenia/Makefile.inc |  2 ++
 src/mainboard/intel/amenia/bootblock.c  | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/src/mainboard/intel/amenia/Makefile.inc b/src/mainboard/intel/amenia/Makefile.inc
index 00d738e..472a5aa 100644
--- a/src/mainboard/intel/amenia/Makefile.inc
+++ b/src/mainboard/intel/amenia/Makefile.inc
@@ -1,3 +1,5 @@
+bootblock-$(CONFIG_LPC_TPM) += bootblock.c
+
 romstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 ramstage-y += mainboard.c
diff --git a/src/mainboard/intel/amenia/bootblock.c b/src/mainboard/intel/amenia/bootblock.c
new file mode 100644
index 0000000..d075336
--- /dev/null
+++ b/src/mainboard/intel/amenia/bootblock.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+
+static const struct pad_config tpm_spi_configs[] = {
+	PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3),	/* FST_SPI_CS2_N */
+};
+
+static void tpm_enable(void)
+{
+	/* Configure gpios */
+	gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs));
+}
+
+void bootblock_mainboard_init(void) {
+	if (IS_ENABLED(CONFIG_LPC_TPM))
+		tpm_enable();
+}