[coreboot-gerrit] Patch set updated for coreboot: coreboot_tables: Extend serial port description
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Thu Apr 21 23:16:49 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14111
-gerrit
commit 0c3134e3ae7c7b7411f0e679964d046e92e37324
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Wed Mar 16 10:21:59 2016 -0700
coreboot_tables: Extend serial port description
Extend the serial port description to include the input clock frequency
and an identifier for the serial port.
Without the input frequency it is impossible for the payload to compute
the baud-rate divisor without making an assumption about the frequency.
This breaks down when the UART is able to support multiple input clock
frequencies.
Add an ID field that may specify the PCI vendor and device ID values
which are required for CorebootPayloadPkg to initialize PCI based UARTs.
A Kconfig value provides the default for this field to prevent breaking
existing coreboot implementations.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Load the SPI driver stack
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: I05a7e864afcd930916658e3efed53ff2efd403ec
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
payloads/libpayload/include/coreboot_tables.h | 2 ++
src/commonlib/include/commonlib/coreboot_tables.h | 2 ++
src/drivers/uart/Kconfig | 7 +++++++
src/drivers/uart/oxpcie_early.c | 2 ++
src/drivers/uart/pl011.c | 8 ++++++++
src/drivers/uart/uart8250io.c | 6 ++++--
src/drivers/uart/uart8250mem.c | 5 ++++-
src/lib/coreboot_table.c | 2 ++
src/soc/intel/quark/Kconfig | 5 +++++
9 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 276f25f..06d1768 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -121,6 +121,8 @@ struct cb_serial {
u32 baseaddr;
u32 baud;
u32 regwidth;
+ u32 input_hertz;
+ u32 id;
};
#define CB_TAG_CONSOLE 0x00010
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index 5c28791..3839028 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -173,6 +173,8 @@ struct lb_serial {
uint32_t baseaddr;
uint32_t baud;
uint32_t regwidth;
+ uint32_t input_hertz;
+ uint32_t id;
};
#define LB_TAG_CONSOLE 0x0010
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig
index f4ad011..25dc980 100644
--- a/src/drivers/uart/Kconfig
+++ b/src/drivers/uart/Kconfig
@@ -41,3 +41,10 @@ config DRIVERS_UART_PL011
bool
default n
select HAVE_UART_SPECIAL
+
+config UART_DEVICE_ID
+ hex
+ default 0
+ help
+ ID to help the payload identify the proper UART
+
diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c
index eb91d31..479408b 100644
--- a/src/drivers/uart/oxpcie_early.c
+++ b/src/drivers/uart/oxpcie_early.c
@@ -92,6 +92,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
+ serial.input_hertz = uart_platform_refclk();
+ serial.id = CONFIG_UART_DEVICE_ID;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c
index aa55c68..cfd6f32 100644
--- a/src/drivers/uart/pl011.c
+++ b/src/drivers/uart/pl011.c
@@ -48,8 +48,16 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
+ serial.input_hertz = uart_platform_refclk();
+ serial.id = CONFIG_UART_DEVICE_ID;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
+
+__attribute__((weak)) unsigned int uart_platform_refclk(void)
+{
+ return 0; /* Unknown input frequency */
+}
+
#endif
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c
index 63bc42f..683b7dd 100644
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -30,8 +30,8 @@
/* Nominal values only, good for the range of choices Kconfig offers for
* set of standard baudrates.
*/
-#define BAUDRATE_REFCLK (115200)
-#define BAUDRATE_OVERSAMPLE (1)
+#define BAUDRATE_REFCLK (115200 * 16)
+#define BAUDRATE_OVERSAMPLE (16)
/* Expected character delay at 1200bps is 9ms for a working UART
* and no flow-control. Assume UART as stuck if shift register
@@ -139,6 +139,8 @@ void uart_fill_lb(void *data)
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
+ serial.input_hertz = BAUDRATE_REFCLK;
+ serial.id = CONFIG_UART_DEVICE_ID;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c
index 278ddb8..9c1f622 100644
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -117,7 +117,8 @@ void uart_init(int idx)
return;
unsigned int div;
- div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16);
+ div = uart_baudrate_divisor(default_baudrate(),
+ uart_platform_refclk(), 16);
uart8250_mem_init(base, div);
}
@@ -156,6 +157,8 @@ void uart_fill_lb(void *data)
serial.regwidth = sizeof(uint32_t);
else
serial.regwidth = sizeof(uint8_t);
+ serial.input_hertz = uart_platform_refclk();
+ serial.id = CONFIG_UART_DEVICE_ID;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index eeed65e..e4788a5 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -117,6 +117,8 @@ void lb_add_serial(struct lb_serial *new_serial, void *data)
serial->baseaddr = new_serial->baseaddr;
serial->baud = new_serial->baud;
serial->regwidth = new_serial->regwidth;
+ serial->input_hertz = new_serial->input_hertz;
+ serial->id = new_serial->id;
}
void lb_add_console(uint16_t consoletype, void *data)
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index aab509a..d71af30 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -59,6 +59,11 @@ config TTYS0_LCS
depends on ENABLE_BUILTIN_HSUART1
default 3
+config UART_DEVICE_ID
+ hex
+ depends on ENABLE_BUILTIN_HSUART1
+ default 0x09368086
+
#####
# Debug support
# The following options provide debug support for the Quark coreboot
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