[coreboot-gerrit] New patch to review for coreboot: soc/intel/quark/romstage: Increase size of FSP

[Leroy P Leahy (leroy.p.leahy@intel.com)]

Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14453

-gerrit

commit 2ced390813495354f8fdd357beb80281bc3c0115
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Tue Apr 19 14:17:46 2016 -0700

    soc/intel/quark/romstage: Increase size of FSP
    
    Increase the size of FSP to 320 KiB.  The debug build of QuarkFspPkg
    with GCC 4.8.4 is just over the 256 KiB limit.
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I817ab310e6de145db37174ebf2b9d661167acb01
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/soc/intel/quark/romstage/esram_init.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/intel/quark/romstage/esram_init.inc b/src/soc/intel/quark/romstage/esram_init.inc
index b899741..5cc3f0d 100644
--- a/src/soc/intel/quark/romstage/esram_init.inc
+++ b/src/soc/intel/quark/romstage/esram_init.inc
@@ -457,7 +457,7 @@ esram_init_done:
 	/* Copy FSP image to eSRAM and call it. */
 	/* TODO: FSP location/size could be got in a routine. */
 	cld
-	movl	$(0x00040000), %ecx               /* 256K DWORDs = 64K */
+	movl	$(0x00050000), %ecx
 	shrl	$2, %ecx
 	movl	$CONFIG_FSP_LOC, %esi   /* The source address. */
 	movl	$CONFIG_FSP_ESRAM_LOC, %edi   /* FSP destination in ESRAM */