[coreboot-gerrit] New patch to review for coreboot: lib/coreboot_table: add architecture hooks for adding tables

Aaron Durbin (adurbin@chromium.org) gerrit at coreboot.org
Wed Apr 20 04:43:40 CEST 2016


Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14435

-gerrit

commit b8988899e696c02eafefd7151e1a548edde34655
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Apr 19 20:37:51 2016 -0500

    lib/coreboot_table: add architecture hooks for adding tables
    
    Add a architecture specific function, arch_write_tables(), that
    allows an architecture to add its required tables for booting.
    This callback helps write_tables() to be de-duplicated.
    
    Change-Id: I805c2f166b1e75942ad28b6e7e1982d64d2d5498
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/arch/arm/tables.c     |  4 ++++
 src/arch/arm64/tables.c   |  4 ++++
 src/arch/mips/tables.c    |  4 ++++
 src/arch/power8/tables.c  |  4 ++++
 src/arch/riscv/tables.c   |  4 ++++
 src/arch/x86/tables.c     | 36 +++++++++++++++++++-----------------
 src/include/boot/tables.h | 12 ++++++++++++
 src/lib/coreboot_table.c  |  3 +++
 8 files changed, 54 insertions(+), 17 deletions(-)

diff --git a/src/arch/arm/tables.c b/src/arch/arm/tables.c
index 20891e8..92213c5 100644
--- a/src/arch/arm/tables.c
+++ b/src/arch/arm/tables.c
@@ -24,6 +24,10 @@
 #include <cbmem.h>
 #include <lib.h>
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c
index 20891e8..92213c5 100644
--- a/src/arch/arm64/tables.c
+++ b/src/arch/arm64/tables.c
@@ -24,6 +24,10 @@
 #include <cbmem.h>
 #include <lib.h>
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
diff --git a/src/arch/mips/tables.c b/src/arch/mips/tables.c
index d54b8d6..32e73bc 100644
--- a/src/arch/mips/tables.c
+++ b/src/arch/mips/tables.c
@@ -25,6 +25,10 @@
 #include <cbmem.h>
 #include <lib.h>
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
diff --git a/src/arch/power8/tables.c b/src/arch/power8/tables.c
index 17e678a..ff07c31 100644
--- a/src/arch/power8/tables.c
+++ b/src/arch/power8/tables.c
@@ -24,6 +24,10 @@
 #include <cbmem.h>
 #include <lib.h>
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
diff --git a/src/arch/riscv/tables.c b/src/arch/riscv/tables.c
index 20891e8..92213c5 100644
--- a/src/arch/riscv/tables.c
+++ b/src/arch/riscv/tables.c
@@ -24,6 +24,10 @@
 #include <cbmem.h>
 #include <lib.h>
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c
index 4fba509..94fe691 100644
--- a/src/arch/x86/tables.c
+++ b/src/arch/x86/tables.c
@@ -181,6 +181,25 @@ static unsigned long write_smbios_table(unsigned long rom_table_end)
 	return rom_table_end;
 }
 
+void arch_write_tables(uintptr_t coreboot_table)
+{
+	unsigned long rom_table_end = 0xf0000;
+
+	/* This table must be between 0x0f0000 and 0x100000 */
+	if (IS_ENABLED(CONFIG_GENERATE_PIRQ_TABLE))
+		rom_table_end = write_pirq_table(rom_table_end);
+
+	/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
+	if (IS_ENABLED(CONFIG_GENERATE_MP_TABLE))
+		rom_table_end = write_mptable(rom_table_end);
+
+	if (IS_ENABLED(CONFIG_HAVE_ACPI_TABLES))
+		rom_table_end = write_acpi_table(rom_table_end);
+
+	if (IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES))
+		rom_table_end = write_smbios_table(rom_table_end);
+}
+
 void bootmem_arch_add_ranges(void)
 {
 }
@@ -188,7 +207,6 @@ void bootmem_arch_add_ranges(void)
 void write_tables(void)
 {
 	unsigned long low_table_start, low_table_end;
-	unsigned long rom_table_end;
 
 	/* Even if high tables are configured, some tables are copied both to
 	 * the low and the high area, so payloads and OSes don't need to know
@@ -196,8 +214,6 @@ void write_tables(void)
 	 */
 	unsigned long high_table_pointer;
 
-	rom_table_end =   0xf0000;
-
 	/* Start low addr at 0x500, so we don't run into conflicts with the BDA
 	 * in case our data structures grow beyond 0x400. Only GDT
 	 * and the coreboot table use low_tables.
@@ -205,20 +221,6 @@ void write_tables(void)
 	low_table_start = 0;
 	low_table_end = 0x500;
 
-	/* This table must be between 0x0f0000 and 0x100000 */
-	if (IS_ENABLED(CONFIG_GENERATE_PIRQ_TABLE))
-		rom_table_end = write_pirq_table(rom_table_end);
-
-	/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
-	if (IS_ENABLED(CONFIG_GENERATE_MP_TABLE))
-		rom_table_end = write_mptable(rom_table_end);
-
-	if (IS_ENABLED(CONFIG_HAVE_ACPI_TABLES))
-		rom_table_end = write_acpi_table(rom_table_end);
-
-	if (IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES))
-		rom_table_end = write_smbios_table(rom_table_end);
-
 	post_code(0x9e);
 
 	post_code(0x9d);
diff --git a/src/include/boot/tables.h b/src/include/boot/tables.h
index e86adfc..c2d7b48 100644
--- a/src/include/boot/tables.h
+++ b/src/include/boot/tables.h
@@ -3,6 +3,18 @@
 
 #include <boot/coreboot_tables.h>
 
+/*
+ * Write architecture specific tables as well as the common
+ * coreboot table.
+ */
 void write_tables(void);
 
+/*
+ * Allow per-architecture table writes called from write_tables(). The
+ * coreboot_table parameter provides a reference to where the coreboot
+ * table will be written. The parameter is to allow architectures to
+ * provide a forwarding table to real coreboot table.
+ */
+void arch_write_tables(uintptr_t coreboot_table);
+
 #endif /* BOOT_TABLES_H */
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 6967217..583f609 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -19,6 +19,7 @@
 #include <console/uart.h>
 #include <ip_checksum.h>
 #include <boot/coreboot_tables.h>
+#include <boot/tables.h>
 #include <boot_device.h>
 #include <string.h>
 #include <version.h>
@@ -464,6 +465,8 @@ unsigned long write_coreboot_table(
 {
 	struct lb_header *head;
 
+	arch_write_tables(rom_table_end);
+
 	if (low_table_start || low_table_end) {
 		printk(BIOS_DEBUG, "Writing table forward entry at 0x%08lx\n",
 				low_table_end);



More information about the coreboot-gerrit mailing list