[coreboot-gerrit] New patch to review for coreboot: soc/intel/apollolake: No need to re-save BIST result

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14381

-gerrit

commit bbeea47f87ffc06416a49c412c0ec26532b8cc77
Author: Furquan Shaikh <furquan at google.com>
Date:   Fri Apr 15 10:34:31 2016 -0700

    soc/intel/apollolake: No need to re-save BIST result
    
    BIST result is already stored by arch/x86/bootblock_ctr0.S in
    mm0. Also, eax does not contain BIST result by the time control
    reaches bootblock_pre_c_entry. bootblock_crt0.S saves timestamp in mm2
    which was being overwritten here. Thus, remove the saving of BIST
    result from SoC code.
    
    Change-Id: I65444689cf104c59c84574019f5daf82aab10bc7
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 src/soc/intel/apollolake/bootblock/cache_as_ram.S | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
index 3c7bd29..9d2bba0 100644
--- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S
+++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
@@ -25,10 +25,6 @@
 
 .global bootblock_pre_c_entry
 bootblock_pre_c_entry:
-	/*
-	 * eax:  BIST value
-	 */
-	movd	%eax, %mm2
 
 .global cache_as_ram
 cache_as_ram: