[coreboot-gerrit] Patch set updated for coreboot: mb/lenovo/x220: disable ME
Martin Roth (martinroth@google.com)
gerrit at coreboot.org
Mon Apr 11 04:43:28 CEST 2016
Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14309
-gerrit
commit 27d016a11af15be2105dc5948cc95df25f9ebb77
Author: Alexander Couzens <lynxis at fe80.eu>
Date: Sun Apr 10 23:19:18 2016 +0200
mb/lenovo/x220: disable ME
The ME hangs, the lspci shows no memory and the ME try to request irq 0.
After suspend-resume the linux kernel warns a double used irq.
genirq: Flags mismatch irq 0. 00000080 (mei_me) vs. 00015a00 (timer)
mei_me 0000:00:16.0: request_threaded_irq failed: irq = 0.
dpm_run_callback(): pci_pm_resume+0x0/0xa0 returns -16
PM: Device 0000:00:16.0 failed to resume async: error -16
Change-Id: I56ef66388e58dddcfb858294ba274621c55fbef6
Signed-off-by: Alexander Couzens <lynxis at fe80.eu>
---
src/mainboard/lenovo/x220/devicetree.cb | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 9f25658..6f84acd 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -71,9 +71,7 @@ chip northbridge/intel/sandybridge
register "c2_latency" = "101" # c2 not supported
register "p_cnt_throttling_supported" = "1"
- device pci 16.0 on
- subsystemid 0x17aa 0x21db
- end # Management Engine Interface 1
+ device pci 16.0 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
More information about the coreboot-gerrit
mailing list