[coreboot-gerrit] Patch set updated for coreboot: sb/amd/sp5100: Disable ASF legacy sensor support per RPR v3.02
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sun Apr 10 22:54:15 CEST 2016
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14306
-gerrit
commit 827fa6d49e27257860295529f70737484f1cf55a
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Sun Apr 10 15:45:17 2016 -0500
sb/amd/sp5100: Disable ASF legacy sensor support per RPR v3.02
Change-Id: I8628dc433e12892b0839d727165f609c8b34f66e
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/southbridge/amd/sb700/early_setup.c | 6 ++++++
src/southbridge/amd/sb700/smbus.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index ffdd34b..3333841 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -401,6 +401,12 @@ static void sb700_devices_por_init(void)
if (inb(SMBUS_AUX_IO_BASE) == 0xff)
printk(BIOS_INFO, "%s: Secondary SMBUS controller I/O not found\n", __func__);
+#if CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100
+ else {
+ /* Disable legacy sensor support / reset ASF Slave state machine per RPR 2.27 step 3 */
+ outb(0x40, SMBUS_AUX_IO_BASE + SMBSLVMISC);
+ }
+#endif
/* KB2RstEnable */
pci_write_config8(dev, 0x40, 0x44);
diff --git a/src/southbridge/amd/sb700/smbus.h b/src/southbridge/amd/sb700/smbus.h
index 0e6b7b8..1b90091 100644
--- a/src/southbridge/amd/sb700/smbus.h
+++ b/src/southbridge/amd/sb700/smbus.h
@@ -37,6 +37,7 @@
#define SMBSLVCMD_SHADOW 0x9
#define SMBSLVEVT 0xa
#define SMBSLVDAT 0xc
+#define SMBSLVMISC 0xd
#define AX_INDXC 0
#define AX_INDXP 1
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