[coreboot-gerrit] Patch merged into coreboot/master: nb/intel/sandybridge/raminit: always use mrccache
gerrit at coreboot.org
gerrit at coreboot.org
Sun Apr 10 18:15:48 CEST 2016
the following patch was just integrated into master:
commit 56abd4d878e226c1c4499fdc28901711e2f2a95c
Author: Patrick Rudolph <siro at das-labor.org>
Date: Sun Mar 13 11:07:45 2016 +0100
nb/intel/sandybridge/raminit: always use mrccache
Always use MRC cache if possible.
Added a CRC16 array to make sure the DIMMs haven't been replaced.
In case one of the CRC's doesn't match, start normal RAM training.
Use new fallback in case of broken mrc cache.
Test system:
* Gigabyte GA-B75M-D3H
* Intel Pentium CPU G2130
Test result:
The system boots a lot faster using the MRC cache.
On swapping DIMMs the CRC16 doesn't match and normal ram training
is started.
Change-Id: Ib48fe8380446846df17d37b22968f7d4fd6b9b13
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
Reviewed-on: https://review.coreboot.org/14172
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
See https://review.coreboot.org/14172 for details.
-gerrit
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