[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Enable CACHE_MRC_SETTINGS
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Fri Apr 8 02:51:09 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14252
-gerrit
commit 7625de1986b225d38b75888de4481d9967d8f568
Author: Hannah Williams <hannah.williams at intel.com>
Date: Mon Mar 14 17:38:51 2016 -0700
soc/intel/apollolake: Enable CACHE_MRC_SETTINGS
Change-Id: I0248001892ef763c39097848b5adc8c1befed1f0
Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
src/soc/intel/apollolake/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 30ee7e5..c911338 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -100,4 +100,8 @@ config ROMSTAGE_ADDR
help
The base address (in CAR) where romstage should be linked
+config CACHE_MRC_SETTINGS
+ bool
+ default y
+
endif
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