[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/apollolake_rvp: Include SOC ASL

Andrey Petrov (andrey.petrov@intel.com) gerrit at coreboot.org
Fri Apr 8 01:32:29 CEST 2016


Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13372

-gerrit

commit 2f30d4b6eb205997b9b0e9c39d001192df0909dd
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date:   Wed Dec 2 17:06:54 2015 -0800

    mainboard/intel/apollolake_rvp: Include SOC ASL
    
    Include northbridge ASL file into board DSDT table.
    
    Change-Id: I33903a9c281e4981bd0f226c22553e22f98075bc
    Signed-off-by: Zhao, Lijian <lijian.zhao at intel.com>
---
 src/mainboard/intel/apollolake_rvp/dsdt.asl | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl
index 7b9fe29..16d09a4 100644
--- a/src/mainboard/intel/apollolake_rvp/dsdt.asl
+++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl
@@ -22,7 +22,8 @@ DefinitionBlock(
 	Scope (\_SB) {
 		Device (PCI0)
 		{
-			Name (_HID, EISAID ("PNP0A08"))	/* PCIe */
+		#include <soc/intel/apollolake/acpi/northbridge.asl>
+		#include <soc/intel/apollolake/acpi/southbridge.asl>
 		}
 	}
 



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