Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14234
-gerrit
commit 63951b8222f874e46282b3c4dac2976c6cbe8ef3
Author: Julius Werner <jwerner at chromium.org>
Date: Wed Mar 23 16:08:11 2016 -0700
google/oak: Log hardware watchdog in eventlog
The MT8173 hardware watchdog can assert an external signal which we use
to reset the TPM on Oak. Therefore we do not need to do the same
double-reset dance as on other Chromebooks to ensure that we reset in a
correct state.
Still, we have a situation where we need to reconfigure the watchdog
early in the bootblock in a way that will clear information about the
previous reboot from the status register, and we need that information
later in ramstage to log the right event. Let's reuse the same watchdog
tombstone mechanism from other boards, except that we don't perform a
second reset and the tombstone is simply used to communicate between
bootblock and ramstage within the same boot.
BRANCH=None
BUG=None
TEST=Run 'mem w 0x10007004 0x8' on Oak, observe how it reboots and how
'mosys eventlog list' shows a hardware watchdog reboot event afterwards.
Change-Id: I1ade018eba652af91814fdaec233b9920f2df01f
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 07af37e11499e86e730f7581862e8f0d67a04218
Original-Change-Id: I0b9c6b83b20d6e1362d650ac2ee49fff45b29767
Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/334449
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
src/mainboard/google/oak/mainboard.c | 1 +
src/soc/mediatek/mt8173/include/soc/memlayout.ld | 3 ++-
src/soc/mediatek/mt8173/wdt.c | 6 ++++--
src/vendorcode/google/chromeos/chromeos.h | 2 ++
src/vendorcode/google/chromeos/watchdog.c | 7 ++++++-
5 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c
index 4208730..e99a5c0 100644
--- a/src/mainboard/google/oak/mainboard.c
+++ b/src/mainboard/google/oak/mainboard.c
@@ -164,6 +164,7 @@ static void mainboard_init(device_t dev)
configure_ext_buck();
elog_init();
+ elog_add_watchdog_reset();
elog_add_boot_reason();
}
diff --git a/src/soc/mediatek/mt8173/include/soc/memlayout.ld b/src/soc/mediatek/mt8173/include/soc/memlayout.ld
index 771f326..5b92153 100644
--- a/src/soc/mediatek/mt8173/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8173/include/soc/memlayout.ld
@@ -40,7 +40,8 @@ SECTIONS
SRAM_START(0x00100000)
VBOOT2_WORK(0x00100000, 12K)
PRERAM_CBMEM_CONSOLE(0x00103000, 16K)
- PRERAM_CBFS_CACHE(0x00107000, 16K)
+ WATCHDOG_TOMBSTONE(0x00107000, 4)
+ PRERAM_CBFS_CACHE(0x00107004, 16K - 4)
TIMESTAMP(0x0010B000, 4K)
ROMSTAGE(0x0010C000, 92K)
STACK(0x00124000, 16K)
diff --git a/src/soc/mediatek/mt8173/wdt.c b/src/soc/mediatek/mt8173/wdt.c
index ba63c13..93ffe09 100644
--- a/src/soc/mediatek/mt8173/wdt.c
+++ b/src/soc/mediatek/mt8173/wdt.c
@@ -18,6 +18,7 @@
#include <reset.h>
#include <soc/addressmap.h>
#include <soc/wdt.h>
+#include <vendorcode/google/chromeos/chromeos.h>
static struct mt8173_wdt_regs * const mt8173_wdt = (void *)RGU_BASE;
@@ -29,9 +30,10 @@ int mtk_wdt_init(void)
wdt_sta = read32(&mt8173_wdt->wdt_status);
printk(BIOS_INFO, "WDT: Last reset was ");
- if (wdt_sta & MTK_WDT_STA_HW_RST)
+ if (wdt_sta & MTK_WDT_STA_HW_RST) {
printk(BIOS_INFO, "hardware watchdog\n");
- else if (wdt_sta & MTK_WDT_STA_SW_RST)
+ mark_watchdog_tombstone();
+ } else if (wdt_sta & MTK_WDT_STA_SW_RST)
printk(BIOS_INFO, "normal software reboot\n");
else if (wdt_sta & MTK_WDT_STA_SPM_RST)
printk(BIOS_INFO, "SPM reboot\n");
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 03f1516..57a2f71 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -34,10 +34,12 @@ void elog_add_boot_reason(void);
/* functions implemented in watchdog.c */
void elog_add_watchdog_reset(void);
+void mark_watchdog_tombstone(void);
void reboot_from_watchdog(void);
#else
static inline void elog_add_boot_reason(void) { return; }
static inline void elog_add_watchdog_reset(void) { return; }
+static inline void mark_watchdog_tombstone(void) { return; }
static inline void reboot_from_watchdog(void) { return; }
#endif /* CONFIG_CHROMEOS */
diff --git a/src/vendorcode/google/chromeos/watchdog.c b/src/vendorcode/google/chromeos/watchdog.c
index 79f7dde..a2b18b7 100644
--- a/src/vendorcode/google/chromeos/watchdog.c
+++ b/src/vendorcode/google/chromeos/watchdog.c
@@ -30,9 +30,14 @@ void elog_add_watchdog_reset(void)
write32(_watchdog_tombstone, 0);
}
+void mark_watchdog_tombstone(void)
+{
+ write32(_watchdog_tombstone, WATCHDOG_TOMBSTONE_MAGIC);
+}
+
void reboot_from_watchdog(void)
{
printk(BIOS_INFO, "Last reset was watchdog, reboot again to reset TPM!\n");
- write32(_watchdog_tombstone, WATCHDOG_TOMBSTONE_MAGIC);
+ mark_watchdog_tombstone();
hard_reset();
}