[coreboot-gerrit] New patch to review for coreboot: Revert "coreboot_table: don't add CMOS checksum twice."

Nico Huber (nico.h@gmx.de) gerrit at coreboot.org
Mon Sep 21 18:19:34 CET 2015


Nico Huber (nico.h at gmx.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11696

-gerrit

commit 4362be15f019599c49e15df5c012a3edffe9c8c7
Author: Nico Huber <nico.h at gmx.de>
Date:   Mon Sep 21 20:11:47 2015 +0200

    Revert "coreboot_table: don't add CMOS checksum twice."
    
    This reverts commit e6606518243d9beda31693d40493b5f7a1a3e2e0.
    
    After some discussion on IRC we decided to revert it as libpayload can
    only read the copy that was removed (and other users like nvramtool can
    only read the other copy). So we need both copies at this time.
    
    Conflicts:
    	3rdparty/arm-trusted-firmware
    	3rdparty/blobs
    	3rdparty/vboot
    	src/lib/coreboot_table.c
    
    Signed-off-by: Nico Huber <nico.h at gmx.de>
    Change-Id: I6cf6b2a1523d771bb52f3d5720b1b16ed4b348db
---
 src/lib/coreboot_table.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 6859bf2..35341ab 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -34,6 +34,9 @@
 #include <cbmem.h>
 #include <bootmem.h>
 #include <spi_flash.h>
+#if CONFIG_USE_OPTION_TABLE
+#include <option_table.h>
+#endif
 #if CONFIG_CHROMEOS
 #if CONFIG_HAVE_ACPI_TABLES
 #include <arch/acpi.h>
@@ -333,6 +336,26 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header)
 	return mainboard;
 }
 
+#if CONFIG_USE_OPTION_TABLE
+static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
+{
+	struct lb_record *rec;
+	struct cmos_checksum *cmos_checksum;
+	rec = lb_new_record(header);
+	cmos_checksum = (struct cmos_checksum *)rec;
+	cmos_checksum->tag = LB_TAG_OPTION_CHECKSUM;
+
+	cmos_checksum->size = (sizeof(*cmos_checksum));
+
+	cmos_checksum->range_start = LB_CKS_RANGE_START * 8;
+	cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
+	cmos_checksum->location = LB_CKS_LOC * 8;
+	cmos_checksum->type = CHECKSUM_PCBIOS;
+
+	return cmos_checksum;
+}
+#endif
+
 static void lb_strings(struct lb_header *header)
 {
 	static const struct {
@@ -435,6 +458,8 @@ unsigned long write_coreboot_table(
 			struct lb_record *rec_dest = lb_new_record(head);
 			/* Copy the option config table, it's already a lb_record... */
 			memcpy(rec_dest,  option_table, option_table->size);
+			/* Create cmos checksum entry in coreboot table */
+			lb_cmos_checksum(head);
 		} else {
 			printk(BIOS_ERR, "cmos_layout.bin could not be found!\n");
 		}



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