[coreboot-gerrit] New patch to review for coreboot: cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10h

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12286

-gerrit

commit 9e679bf63b16ddefb8243a3bd2754c1bdfa634d4
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Sat Oct 31 15:21:24 2015 -0500

    cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10h
    
    The K8 PowerNow! state generator does not generate _PSS objects
    for nodes other than the first CPU package.  This patch backports
    the PowerNow! core count fixes for Family 10h to the K8 CPUs.
    
    Change-Id: I7b411ab75155dfb4bf51ae04301aa16fb2ae89f3
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/cpu/amd/model_fxx/powernow_acpi.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c
index 53330f9..4342d88 100644
--- a/src/cpu/amd/model_fxx/powernow_acpi.c
+++ b/src/cpu/amd/model_fxx/powernow_acpi.c
@@ -104,6 +104,10 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
 	u8 cmp_cap, pwr_lmt;
 	u32 power_limit = 0;
 	u8 index;
+	uint8_t node_count;
+	uint8_t cores_per_node;
+	uint32_t total_core_count;
+	uint32_t dword;
 	msr_t msr;
 	u32 fid_multiplier;
 	static const struct power_limit_encoding TDP[] = {
@@ -160,9 +164,18 @@ static void pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
 	 * cmp_cap : 0x0 SingleCore ; 0x1 DualCore
 	 */
 	printk(BIOS_INFO, "Pstates Algorithm ...\n");
-	cmp_cap =
-	    (pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) &
-	     0x3000) >> 12;
+
+	/* Get number of cores */
+	dword = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xe8);
+	cmp_cap = (dword & 0x3000) >> 12;
+	/* Get number of nodes */
+	dword = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 0)), 0x60);
+	node_count = ((dword & 0x70) >> 4) + 1;
+	cores_per_node = cmp_cap + 1;
+
+	/* Compute total number of cores installed in system */
+	total_core_count = cores_per_node * node_count;
+
 	cpuid1 = cpuid(0x80000001);
 	pwr_lmt = ((cpuid1.ebx & 0x1C0) >> 5) | ((cpuid1.ebx & 0x4000) >> 14);
 	for (index = 0; index < ARRAY_SIZE(TDP); index++)
@@ -364,7 +377,7 @@ write_pstates:
 		  (0x0 << 18) | /* MVS */
 		  (0x5 << 11); /* VST */
 
-	for (index = 0; index < (cmp_cap + 1); index++) {
+	for (index = 0; index < total_core_count; index++) {
 		write_pstates_for_core(Pstate_num, Pstate_feq, Pstate_vid,
 				Pstate_fid, Pstate_power, index,
 				pcontrol_blk, plen, onlyBSP, control);