[coreboot-gerrit] Patch merged into coreboot/master: google/glados: csme: program sml gpios for csme power gating

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 20ffe1944ceb99c2ff11ea20f3343a8adb137639
Author: Archana Patni <archana.patni at intel.com>
Date:   Thu Oct 8 01:43:47 2015 +0530

    google/glados: csme: program sml gpios for csme power gating
    
    For SMT controllers to power gate, all SMT/SMS clock, data and alert signals should be inactive.
    
    The SML0 blocks are not used for any functional purposes and are not configured in the GPIO tables.
    SMT hardware will not allow the blocks to be power gated in this scenario. The SML* pins are
    now configured as GPIOs - input and deep.
    
    With this change, the SMT blocks are properly power gating.
    
    BRANCH=none
    BUG=chrome-os-partner:45618
    TEST=build for Glados.
    
    Change-Id: Ie5406f2a1e0c485ac1290e2154755085fa3bb7b9
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 5b3fe3c2ddea4c5daedb04078b24cff14efa49d5
    Original-Change-Id: I8dcc0bfc121e612a174e6fe3152650d0fcd68f39
    Original-Signed-off-by: Archana Patni <archana.patni at intel.com>
    Original-Signed-off-by: Subramony Sesha <subramony.sesha at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/306481
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/12160
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See http://review.coreboot.org/12160 for details.

-gerrit