[coreboot-gerrit] Patch set updated for coreboot: cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes

Timothy Pearson (tpearson@raptorengineeringinc.com) gerrit at coreboot.org
Fri Oct 23 23:20:37 CEST 2015


Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12065

-gerrit

commit 5ae352b52e0e40467a0779d14fc1e8cce56909e7
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Thu Sep 3 17:43:52 2015 -0500

    cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes
    
    Change-Id: I132874fe5b5a8b9a87422e2f07bff03bc5863ca4
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/cpu/amd/family_10h-family_15h/defaults.h | 12 ++++++++++++
 src/northbridge/amd/amdfam10/misc_control.c  |  6 ++++++
 2 files changed, 18 insertions(+)

diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h
index af59120..7a84fcb 100644
--- a/src/cpu/amd/family_10h-family_15h/defaults.h
+++ b/src/cpu/amd/family_10h-family_15h/defaults.h
@@ -166,6 +166,14 @@ static const struct {
 	  0x0000000C, 0x00000000,
 	  0x0000000C, 0x00000000},	/* Cx and Dx multiple-link processor */
 
+	{ OSVW_ID_Length, AMD_FAM15_ALL, AMD_PTYPE_ALL,
+	  0x00000005, 0x00000000,
+	  0x00000005, 0x00000000},	/* OSVW_ID_Length = 0x5 */
+
+	{ OSVW_Status, AMD_FAM15_ALL, AMD_PTYPE_ALL,
+	  0x00000010, 0x00000000,
+	  0x00000010, 0x00000000},	/* OsvwId4 = 0x1 */
+
 	{ BU_CFG2, AMD_DR_Dx, AMD_PTYPE_ALL,
 	  0x00000000, 1 << (50-32),
 	  0x00000000, 1 << (50-32)},	/* D0 or Above, RdMmExtCfgQwEn*/
@@ -638,6 +646,10 @@ static const struct {
 	{ 3, 0x1b8, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
 	  0x00001000, 0x00001000 },	/* [12] = L3PrivReplEn */
 
+	/* Errata 504 workaround */
+	{ 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
+	  0x00040000, 0x00040000 },	/* [18] = 1b */
+
 	/* IBS Control Register */
 	{ 3, 0x1cc, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
 	  0x00000100, 0x00000100 },	/* [8] = LvtOffsetVal */
diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
index 4b62c69..a3d6b19 100644
--- a/src/northbridge/amd/amdfam10/misc_control.c
+++ b/src/northbridge/amd/amdfam10/misc_control.c
@@ -79,6 +79,7 @@ static void mcf3_read_resources(device_t dev)
 
 static void set_agp_aperture(device_t dev, uint32_t pci_id)
 {
+	uint32_t dword;
 	struct resource *resource;
 
 	resource = probe_resource(dev, 0x94);
@@ -109,6 +110,11 @@ static void set_agp_aperture(device_t dev, uint32_t pci_id)
 
 			/* Report the resource has been stored... */
 			report_resource_stored(pdev, resource, " <gart>");
+
+			/* Errata 540 workaround */
+			dword = pci_read_config32(pdev, 0x90);
+			dword |= 0x1 << 6;			/* DisGartTblWlkPrb = 0x1 */
+			pci_write_config32(pdev, 0x90, dword);
 		}
 	}
 }



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