[coreboot-gerrit] New patch to review for coreboot: northbridge/intel: Add i89xx header file

[Marc Jones (marc@marcjonesconsulting.com)]

Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12167

-gerrit

commit 5b8bc2fed0c2b6e8d7cfb2ded1d6a036bc6397ae
Author: Marc Jones <marc.jones at se-eng.com>
Date:   Thu Sep 24 21:45:13 2015 -0600

    northbridge/intel: Add i89xx header file
    
    The Intel northbridge must be paired with a southbridge. Add the
    the ii89xx southbridge header based on the config setting.
    
    Change-Id: Ied708006310efaba31afe6977ab7e57fe4e5ceec
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
---
 src/northbridge/intel/fsp_sandybridge/northbridge.h     | 4 +++-
 src/northbridge/intel/fsp_sandybridge/report_platform.c | 5 ++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.h b/src/northbridge/intel/fsp_sandybridge/northbridge.h
index 4861254..bf7c7cb 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.h
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.h
@@ -59,8 +59,10 @@
 #define DEFAULT_EPBAR		0xfed19000	/* 4 KB */
 #define DEFAULT_RCBABASE	((u8 *)0xfed1c000)
 
-#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
 #include <southbridge/intel/fsp_bd82x6x/pch.h>
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
+#include <southbridge/intel/fsp_i89xx/pch.h>
 #endif
 
 /* Everything below this line is ignored in the DSDT */
diff --git a/src/northbridge/intel/fsp_sandybridge/report_platform.c b/src/northbridge/intel/fsp_sandybridge/report_platform.c
index e661487..e6353cb 100644
--- a/src/northbridge/intel/fsp_sandybridge/report_platform.c
+++ b/src/northbridge/intel/fsp_sandybridge/report_platform.c
@@ -22,8 +22,11 @@
 #include <arch/cpu.h>
 #include <string.h>
 
-#if CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X
+
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X)
 #include <southbridge/intel/fsp_bd82x6x/pch.h>
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
+#include <southbridge/intel/fsp_i89xx/pch.h>
 #endif
 
 #include <arch/io.h>