[coreboot-gerrit] Patch set updated for coreboot: southbridge/amd/sb700: Disable broken SATA MSI functionality

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11983

-gerrit

commit 178c14e07187ad4315db638af03fb6593f147c4f
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Tue Jun 9 19:12:35 2015 -0500

    southbridge/amd/sb700: Disable broken SATA MSI functionality
    
    Change-Id: I4e0a52eb90910604f8640ad7533b5d71be6c8e20
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/southbridge/amd/sb700/early_setup.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index a06a72f..da03961 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -678,6 +678,7 @@ static void sb700_pci_cfg(void)
 {
 	device_t dev;
 	u8 byte;
+	uint8_t acpi_s1_supported = 1;
 
 	/* SMBus Device, BDF:0-20-0 */
 	dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0);
@@ -730,10 +731,10 @@ static void sb700_pci_cfg(void)
 	byte = pci_read_config8(dev, 0x40);
 	byte |= 1 << 0;
 	pci_write_config8(dev, 0x40, byte);
-	if (get_sb700_revision(pci_locate_device(PCI_ID(0x1002, 0x4385), 0)) <= 0x12)
-		pci_write_config8(dev, 0x34, 0x70); /* set 0x61 to 0x70 if S1 is not supported. */
+	if (acpi_s1_supported)
+		pci_write_config8(dev, 0x34, 0x70);	/* Hide D3 power state and MSI capabilities */
 	else
-		pci_write_config8(dev, 0x34, 0x50); /* set 0x61 to 0x50 if S1 is not supported. */
+		pci_write_config8(dev, 0x61, 0x70);	/* Hide MSI capability */
 	byte &= ~(1 << 0);
 	pci_write_config8(dev, 0x40, byte);
 }