[coreboot-gerrit] Patch set updated for coreboot: northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Fri Oct 23 03:34:52 CEST 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12107
-gerrit
commit e262fc3ee190bafb58adfab926cc24ff9cbd239c
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Tue Oct 20 21:32:09 2015 -0500
northbridge/amd/amdmct: Reduce maximum number of DDR3 DIMMs
CAR space on certain platforms is nearly full. This prevents the
addition of necessary RAM initialization features such as x4 DIMM
support. As the DIMM SPD cache uses a sizeable amount of CAR RAM,
reducing it would free up a significant amount of CAR RAM.
DDR3-based AMD platforms only support up to 3 physical DIMMs on
each channel (6 per node). Reduce the maximum number of DIMMs
on a node from 8 to 6 accordingly.
Change-Id: I38def86da76fc622785318c825670209b2ac9017
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/wrappers/mcti.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h
index 2aba377..ef6e3dc 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti.h
+++ b/src/northbridge/amd/amdmct/wrappers/mcti.h
@@ -51,7 +51,11 @@ UPDATE AS NEEDED
#endif
#ifndef MAX_DIMMS_SUPPORTED
-#define MAX_DIMMS_SUPPORTED 8
+#if IS_ENABLED(CONFIG_DIMM_DDR3)
+ #define MAX_DIMMS_SUPPORTED 6
+#else
+ #define MAX_DIMMS_SUPPORTED 8
+#endif
#endif
#ifndef MAX_CS_SUPPORTED
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