[coreboot-gerrit] Patch set updated for coreboot: allocator: Page align memory mapped PCI resources

[Nico Huber (nico.h@gmx.de)]

Nico Huber (nico.h at gmx.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12111

-gerrit

commit b8e35f25d2a5dbd3c92817fd84ff567bc29914a0
Author: Nico Huber <nico.huber at secunet.com>
Date:   Wed Oct 21 15:43:41 2015 +0200

    allocator: Page align memory mapped PCI resources
    
    To help hypervisors to assign PCI devices individually to virtualization
    guests, page align dynamically allocated MMIO resources.
    
    Tested with kontron/ktqm77 which has dynamically configured onboard
    devices on the root bus and secondary buses. Booted Linux and checked
    the configuration with `lspci -v`. Got the configuration through Muen's
    tools which are very picky about overlapping and alignment. Booted a
    Muen based system that uses many onboard devices. GMA, xHCI and one NIC
    (on a secondary bus) were verified to function properly.
    
    Change-Id: I2b7115070e1ccad64565feff025289732c3b5e66
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
 src/device/pci_device.c      | 6 ++++++
 src/include/device/pci_def.h | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index f2e4d5d..cf2f74f 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -211,6 +211,12 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
 			resource->gran += 1;
 		}
 		resource->limit = limit = moving | (resource->size - 1);
+
+		if (pci_base_address_is_memory_space(attr)) {
+			/* Page-align to allow individual mapping of devices. */
+			if (resource->align < 12)
+				resource->align = 12;
+		}
 	}
 
 	/*
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index ef3427b..04cf945 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -78,6 +78,13 @@
 #define  PCI_BASE_ADDRESS_IO_ATTR_MASK	0x03
 /* bit 1 is reserved if address_space = 1 */
 
+#ifndef __ROMCC__
+static inline int pci_base_address_is_memory_space(unsigned int attr)
+{
+	return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
+}
+#endif
+
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS		0x28
 #define PCI_SUBSYSTEM_VENDOR_ID	0x2c