[coreboot-gerrit] Patch set updated for coreboot: southbridge/amd/sb700: Fix mismatched FADT entries

Timothy Pearson (tpearson@raptorengineeringinc.com) gerrit at coreboot.org
Sun Oct 18 11:54:03 CEST 2015


Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12051

-gerrit

commit 8709938b498401f04b789bd5e1d13589ff5e8efb
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Tue Aug 18 17:45:48 2015 -0500

    southbridge/amd/sb700: Fix mismatched FADT entries
    
    Change-Id: Ifa0b61678fe362481891fc015cebe08485b66fc1
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/southbridge/amd/sb700/fadt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 6b1924f..209e9aa 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -131,7 +131,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 	fadt->x_pm1b_cnt_blk.addrh = 0x0;
 
 	fadt->x_pm2_cnt_blk.space_id = 1;
-	fadt->x_pm2_cnt_blk.bit_width = 0;
+	fadt->x_pm2_cnt_blk.bit_width = 8;
 	fadt->x_pm2_cnt_blk.bit_offset = 0;
 	fadt->x_pm2_cnt_blk.resv = 0;
 	fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK;
@@ -145,7 +145,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 	fadt->x_pm_tmr_blk.addrh = 0x0;
 
 	fadt->x_gpe0_blk.space_id = 1;
-	fadt->x_gpe0_blk.bit_width = 32;
+	fadt->x_gpe0_blk.bit_width = 64;
 	fadt->x_gpe0_blk.bit_offset = 0;
 	fadt->x_gpe0_blk.resv = 0;
 	fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK;



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