[coreboot-gerrit] Patch set updated for coreboot: cpu/amd/family_10h-family_15h: Enable DFE on Family 15h HT3 links

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12072

-gerrit

commit de966863cbe18e1d78e0d805ca9d10a7a7adc7c3
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Sun Sep 13 15:54:32 2015 -0500

    cpu/amd/family_10h-family_15h: Enable DFE on Family 15h HT3 links
    
    Change-Id: I5e719984ddd723f9e375ff1a9d4fa1ef042cf3eb
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/cpu/amd/family_10h-family_15h/defaults.h  | 8 ++++++++
 src/cpu/amd/family_10h-family_15h/init_cpus.c | 2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h
index 7a84fcb..b906866 100644
--- a/src/cpu/amd/family_10h-family_15h/defaults.h
+++ b/src/cpu/amd/family_10h-family_15h/defaults.h
@@ -857,4 +857,12 @@ static const struct {
 	{ 0xC0, AMD_FAM15_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
 	  0x40040000, 0xe01F0000 },	/* [31:29] RttCtl = 02h,
 					   [20:16] RttIndex = 04h */
+
+	{ 0xc4, AMD_FAM15_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_HT3,
+	  0x00013480, 0x0003fc80 },	/* [17:10] DCV = 0x4d,
+					       [7] DfeEn = 0x1 */
+
+	{ 0xd4, AMD_FAM15_ALL, AMD_PTYPE_ALL, HTPHY_LINKTYPE_HT3,
+	  0x00013480, 0x0003fc80 },     /* [17:10] DCV = 0x4d,
+					       [7] DfeEn = 0x1 */
 };
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 330f498..c6a91b4 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -1189,7 +1189,7 @@ static void cpuSetAMDPCI(u8 node)
 		/* Check for dual node capability */
 		if (f3xe8 & 0x20000000)
 			dual_node = 1;
-		
+
 		/* Determine the number of active compute units on this node */
 		f5x80 = pci_read_config32(NODE_PCI(node, 5), 0x80);
 		cu_enabled = f5x80 & 0xf;