[coreboot-gerrit] New patch to review for coreboot: SB800-mainboards: use write8 to disable unused GPP CLK

[Felix Held (felix-coreboot@felixheld.de)]

Felix Held (felix-coreboot at felixheld.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12081

-gerrit

commit a4e059678578e6541b77c1666b4412136bdcf60b
Author: Felix Held <felix-coreboot at felixheld.de>
Date:   Sat Oct 17 13:16:27 2015 +0200

    SB800-mainboards: use write8 to disable unused GPP CLK
    
    don't use non-volatile pointers for MMIO access
    
    Change-Id: I9f38012a806e43f2535265f1d25537c59b53904e
    Signed-off-by: Felix Held <felix-coreboot at felixheld.de>
---
 src/mainboard/amd/persimmon/mainboard.c          | 10 +++++-----
 src/mainboard/gizmosphere/gizmo/mainboard.c      | 10 +++++-----
 src/mainboard/jetway/nf81-t56n-lf/mainboard.c    | 10 +++++-----
 src/mainboard/lippert/frontrunner-af/mainboard.c | 10 +++++-----
 src/mainboard/lippert/toucan-af/mainboard.c      | 10 +++++-----
 5 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c
index ae18a37..a9cdab3 100644
--- a/src/mainboard/amd/persimmon/mainboard.c
+++ b/src/mainboard/amd/persimmon/mainboard.c
@@ -158,11 +158,11 @@ static void mainboard_enable(device_t dev)
 	/* enable GPP CLK0 thru CLK1 */
 	/* disable GPP CLK2 thru SLT_GFX_CLK */
 	u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
-	*(misc_mem_clk_cntrl + 0) = 0xFF;
-	*(misc_mem_clk_cntrl + 1) = 0x00;
-	*(misc_mem_clk_cntrl + 2) = 0x00;
-	*(misc_mem_clk_cntrl + 3) = 0x00;
-	*(misc_mem_clk_cntrl + 4) = 0x00;
+	write8(misc_mem_clk_cntrl + 0, 0xFF);
+	write8(misc_mem_clk_cntrl + 1, 0x00);
+	write8(misc_mem_clk_cntrl + 2, 0x00);
+	write8(misc_mem_clk_cntrl + 3, 0x00);
+	write8(misc_mem_clk_cntrl + 4, 0x00);
 
 	/*
 	 * Initialize ASF registers to an arbitrary address because someone
diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c
index 82de752..d04a0aa 100644
--- a/src/mainboard/gizmosphere/gizmo/mainboard.c
+++ b/src/mainboard/gizmosphere/gizmo/mainboard.c
@@ -62,11 +62,11 @@ static void mainboard_enable(device_t dev)
 	/* enable GPP CLK0 thru CLK1 */
 	/* disable GPP CLK2 thru SLT_GFX_CLK */
 	u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
-	*(misc_mem_clk_cntrl + 0) = 0xFF;
-	*(misc_mem_clk_cntrl + 1) = 0x00;
-	*(misc_mem_clk_cntrl + 2) = 0x00;
-	*(misc_mem_clk_cntrl + 3) = 0x00;
-	*(misc_mem_clk_cntrl + 4) = 0x00;
+	write8(misc_mem_clk_cntrl + 0, 0xFF);
+	write8(misc_mem_clk_cntrl + 1, 0x00);
+	write8(misc_mem_clk_cntrl + 2, 0x00);
+	write8(misc_mem_clk_cntrl + 3, 0x00);
+	write8(misc_mem_clk_cntrl + 4, 0x00);
 
 	/*
 	 * Force the onboard SATA port to GEN2 speed.
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
index 9f6cf78..e64fce0 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
@@ -160,11 +160,11 @@ static void mainboard_enable(device_t dev)
 	/* enable GPP CLK0 thru CLK3 (interleaved) */
 	/* disable GPP CLK4 thru SLT_GFX_CLK */
 	u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
-	*(misc_mem_clk_cntrl + 0) = 0xFF;
-	*(misc_mem_clk_cntrl + 1) = 0xFF;
-	*(misc_mem_clk_cntrl + 2) = 0x00;
-	*(misc_mem_clk_cntrl + 3) = 0x00;
-	*(misc_mem_clk_cntrl + 4) = 0x00;
+	write8(misc_mem_clk_cntrl + 0, 0xFF);
+	write8(misc_mem_clk_cntrl + 1, 0xFF);
+	write8(misc_mem_clk_cntrl + 2, 0x00);
+	write8(misc_mem_clk_cntrl + 3, 0x00);
+	write8(misc_mem_clk_cntrl + 4, 0x00);
 
 	/*
 	 * Initialize ASF registers to an arbitrary address because someone
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index 692e2a6..6da340c 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -171,11 +171,11 @@ static void mainboard_enable(device_t dev)
 	/* enable GPP CLK0 */
 	/* disable GPP CLK1 thru SLT_GFX_CLK */
 	u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
-	*(misc_mem_clk_cntrl + 0) = 0x0F;
-	*(misc_mem_clk_cntrl + 1) = 0x00;
-	*(misc_mem_clk_cntrl + 2) = 0x00;
-	*(misc_mem_clk_cntrl + 3) = 0x00;
-	*(misc_mem_clk_cntrl + 4) = 0x00;
+	write8(misc_mem_clk_cntrl + 0, 0x0F);
+	write8(misc_mem_clk_cntrl + 1, 0x00);
+	write8(misc_mem_clk_cntrl + 2, 0x00);
+	write8(misc_mem_clk_cntrl + 3, 0x00);
+	write8(misc_mem_clk_cntrl + 4, 0x00);
 
 	/*
 	 * Initialize ASF registers to an arbitrary address because someone
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c
index 4afef23..ea62e24 100644
--- a/src/mainboard/lippert/toucan-af/mainboard.c
+++ b/src/mainboard/lippert/toucan-af/mainboard.c
@@ -138,11 +138,11 @@ static void mainboard_enable(device_t dev)
 	/* enable GPP CLK0 thru CLK1 */
 	/* disable GPP CLK2 thru SLT_GFX_CLK */
 	u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
-	*(misc_mem_clk_cntrl + 0) = 0xFF;
-	*(misc_mem_clk_cntrl + 1) = 0x00;
-	*(misc_mem_clk_cntrl + 2) = 0x00;
-	*(misc_mem_clk_cntrl + 3) = 0x00;
-	*(misc_mem_clk_cntrl + 4) = 0x00;
+	write8(misc_mem_clk_cntrl + 0, 0xFF);
+	write8(misc_mem_clk_cntrl + 1, 0x00);
+	write8(misc_mem_clk_cntrl + 2, 0x00);
+	write8(misc_mem_clk_cntrl + 3, 0x00);
+	write8(misc_mem_clk_cntrl + 4, 0x00);
 
 	/*
 	 * Initialize ASF registers to an arbitrary address because someone