[coreboot-gerrit] New patch to review for coreboot: arm/arm64: Generalize bootblock C entry point
Julius Werner (jwerner@chromium.org)
gerrit at coreboot.org
Sat Oct 17 09:35:42 CEST 2015
Julius Werner (jwerner at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12076
-gerrit
commit 7ba2785751a2f2e1bd2bc3563208811dd5c39ab2
Author: Julius Werner <jwerner at chromium.org>
Date: Fri Oct 9 13:37:58 2015 -0700
arm/arm64: Generalize bootblock C entry point
When we first added ARM support to coreboot, it was clear that the
bootblock would need to do vastly different tasks than on x86, so we
moved its main logic under arch/. Now that we have several more
architectures, it turns out (as with so many things lately) that x86 is
really the odd one out, and all the others are trying to do pretty much
the same thing. This has already caused maintenance issues as the ARM32
bootblock developed and less-mature architectures were left behind with
old cruft.
This patch tries to address that problem by centralizing that logic
under lib/ for use by all architectures/SoCs that don't explicitly
opt-out (with the slightly adapted existing BOOTBLOCK_CUSTOM option).
This works great out of the box for ARM32 and ARM64. It could probably
be easily applied to MIPS and RISCV as well, but I don't have any of
those boards to test so I'll mark them as BOOTBLOCK_CUSTOM for now and
leave that for later cleanup.
BRANCH=None
BUG=None
TEST=Built Jerry and Falco, booted Oak.
Change-Id: Ibbf727ad93651e388aef20e76f03f5567f9860cb
Signed-off-by: Julius Werner <jwerner at chromium.org>
---
src/Kconfig | 7 +++
src/arch/arm/Kconfig | 6 ---
src/arch/arm/armv4/Makefile.inc | 3 +-
src/arch/arm/armv7/Makefile.inc | 6 +--
src/arch/arm/armv7/bootblock_simple.c | 51 ------------------
src/arch/arm/include/bootblock_common.h | 28 ----------
src/arch/arm64/Kconfig | 6 ---
src/arch/arm64/armv8/Makefile.inc | 9 ++--
src/arch/arm64/armv8/bootblock_simple.c | 64 ----------------------
src/arch/arm64/include/bootblock_common.h | 11 ----
src/arch/mips/Kconfig | 1 +
src/arch/mips/bootblock_simple.c | 2 +-
src/arch/mips/include/arch/bootblock_common.h | 30 +++++++++++
src/arch/mips/include/bootblock_common.h | 30 -----------
src/arch/riscv/Kconfig | 7 +--
src/arch/riscv/bootblock_simple.c | 1 -
src/arch/riscv/include/bootblock_common.h | 16 ------
src/arch/x86/Kconfig | 2 +
src/arch/x86/bootblock_normal.c | 2 +-
src/arch/x86/bootblock_simple.c | 2 +-
src/arch/x86/include/arch/bootblock_common.h | 77 +++++++++++++++++++++++++++
src/arch/x86/include/bootblock_common.h | 77 ---------------------------
src/include/bootblock_common.h | 28 ++++++++++
src/lib/Makefile.inc | 6 ++-
src/lib/bootblock.c | 49 +++++++++++++++++
src/soc/broadcom/cygnus/Kconfig | 4 --
src/soc/marvell/bg4cd/Kconfig | 6 +--
src/soc/nvidia/tegra124/Kconfig | 10 +---
src/soc/nvidia/tegra132/Kconfig | 10 +---
src/soc/nvidia/tegra210/Kconfig | 10 +---
src/soc/rockchip/rk3288/Kconfig | 4 --
31 files changed, 215 insertions(+), 350 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 2822bfe..0830912 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -253,6 +253,7 @@ config FLASHMAP_OFFSET
help
Offset of flash map in firmware image
+# TODO: This doesn't belong here, move to src/arch/x86/Kconfig
choice
prompt "Bootblock behaviour"
default BOOTBLOCK_SIMPLE
@@ -265,6 +266,12 @@ config BOOTBLOCK_NORMAL
endchoice
+# To be selected by arch, SoC or mainboard if it does not want use the normal
+# src/lib/bootblock.c#main() C entry point.
+config BOOTBLOCK_CUSTOM
+ bool
+ default n
+
config BOOTBLOCK_SOURCE
string
default "bootblock_simple.c" if BOOTBLOCK_SIMPLE
diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig
index 2499d2d..9f14dda 100644
--- a/src/arch/arm/Kconfig
+++ b/src/arch/arm/Kconfig
@@ -22,12 +22,6 @@ config ARCH_RAMSTAGE_ARM
source src/arch/arm/armv4/Kconfig
source src/arch/arm/armv7/Kconfig
-# If a custom bootblock is necessary, this option should be "select"-ed by
-# the thing that needs it, probably the CPU.
-config ARM_BOOTBLOCK_CUSTOM
- bool
- default n
-
config ARM_LPAE
bool
default n
diff --git a/src/arch/arm/armv4/Makefile.inc b/src/arch/arm/armv4/Makefile.inc
index 75d9b9b..b9adf4a 100644
--- a/src/arch/arm/armv4/Makefile.inc
+++ b/src/arch/arm/armv4/Makefile.inc
@@ -28,9 +28,8 @@ armv4_flags = -marm -march=armv4t -I$(src)/arch/arm/include/armv4/ \
ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV4),y)
-ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
+ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
bootblock-y += bootblock.S
-bootblock-y += bootblock_simple.c
endif
bootblock-y += cache.c
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index 089ef79..9a198be 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -35,9 +35,8 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
bootblock-c-ccopts += $(armv7-a_flags)
bootblock-S-ccopts += $(armv7-a_asm_flags)
-ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
+ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
bootblock-y += bootblock.S
-bootblock-$(CONFIG_BOOTBLOCK_SIMPLE) += bootblock_simple.c
endif
bootblock-y += cache.c
@@ -50,9 +49,8 @@ else ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7_M),y)
bootblock-c-ccopts += $(armv7-m_flags)
bootblock-S-ccopts += $(armv7-m_asm_flags)
-ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
+ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
bootblock-y += bootblock_m.S
-bootblock-y += bootblock_simple.c
endif
bootblock-y += exception_m.c
bootblock-y += cache_m.c
diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
deleted file mode 100644
index 4dc0975..0000000
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2010 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include <arch/exception.h>
-#include <arch/stages.h>
-#include <bootblock_common.h>
-#include <console/console.h>
-#include <delay.h>
-#include <program_loading.h>
-#include <smp/node.h>
-#include <timestamp.h>
-
-__attribute__((weak)) void bootblock_mainboard_early_init(void) { /* no-op */ }
-__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
-__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
-
-void main(void)
-{
- init_timer();
- if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION))
- timestamp_init(timestamp_get());
-
- bootblock_mainboard_early_init();
-
-#if CONFIG_BOOTBLOCK_CONSOLE
- console_init();
- exception_init();
-#endif
-
- bootblock_soc_init();
- bootblock_mainboard_init();
-
- run_romstage();
-}
diff --git a/src/arch/arm/include/bootblock_common.h b/src/arch/arm/include/bootblock_common.h
deleted file mode 100644
index acd7741..0000000
--- a/src/arch/arm/include/bootblock_common.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#ifndef __ARCH_BOOTBLOCK_COMMON_H
-#define __ARCH_BOOTBLOCK_COMMON_H
-
-/* These are defined as weak no-ops that can be overridden by mainboard/SoC. */
-void bootblock_mainboard_early_init(void);
-void bootblock_mainboard_init(void);
-void bootblock_soc_init(void);
-
-#endif /* __ARCH_BOOTBLOCK_COMMON_H */
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig
index 2c87132..9b06589 100644
--- a/src/arch/arm64/Kconfig
+++ b/src/arch/arm64/Kconfig
@@ -22,12 +22,6 @@ config ARCH_RAMSTAGE_ARM64
source src/arch/arm64/armv8/Kconfig
source src/arch/arm64/cpu/Kconfig
-# If a custom bootblock is necessary, this option should be "select"-ed by
-# the thing that needs it, probably the CPU.
-config ARM64_BOOTBLOCK_CUSTOM
- bool
- default n
-
config ARM64_USE_ARM_TRUSTED_FIRMWARE
bool
default n
diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc
index 7edb1c7..a1d0046 100644
--- a/src/arch/arm64/armv8/Makefile.inc
+++ b/src/arch/arm64/armv8/Makefile.inc
@@ -30,10 +30,6 @@ armv8_asm_flags = $(armv8_flags)
################################################################################
ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV8_64),y)
-ifneq ($(CONFIG_ARM64_BOOTBLOCK_CUSTOM),y)
-bootblock-y += bootblock.S
-bootblock-y += bootblock_simple.c
-endif
bootblock-y += cache.c
bootblock-y += cache_helpers.S
bootblock-y += cpu.S
@@ -42,6 +38,11 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c
bootblock-c-ccopts += $(armv8_flags)
bootblock-S-ccopts += $(armv8_asm_flags)
+# Required to access unaligned timestamp struct members before MMU is active
+# (TODO: Maybe use explicit unaligned accesses in timestamp code instead, or
+# evaluate redesigning timestamp data structures to avoid misaligned members.)
+bootblock-c-ccopts += -mstrict-align
+
endif
################################################################################
diff --git a/src/arch/arm64/armv8/bootblock_simple.c b/src/arch/arm64/armv8/bootblock_simple.c
deleted file mode 100644
index 8cfc832..0000000
--- a/src/arch/arm64/armv8/bootblock_simple.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include <bootblock_common.h>
-#include <arch/cache.h>
-#include <arch/stages.h>
-#include <arch/exception.h>
-#include <cbfs.h>
-#include <console/console.h>
-#include <program_loading.h>
-
-static int boot_cpu(void)
-{
- /*
- * FIXME: This is a stub for now. All non-boot CPUs should be
- * waiting for an interrupt. We could move the chunk of assembly
- * which puts them to sleep in here...
- */
- return 1;
-}
-
-void main(void)
-{
- /* Globally disable MMU, caches, and branch prediction (these should
- * be disabled by default on reset) */
- mmu_disable();
-
- /*
- * Re-enable icache and branch prediction. MMU and dcache will be
- * set up later.
- *
- * Note: If booting from USB, we need to disable branch prediction
- * before copying from USB into RAM (FIXME: why?)
- */
-
- if (boot_cpu()) {
- //bootblock_cpu_init();
- //bootblock_mainboard_init();
- }
-
-#if IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)
- console_init();
- exception_init();
-#endif
-
- run_romstage();
-}
diff --git a/src/arch/arm64/include/bootblock_common.h b/src/arch/arm64/include/bootblock_common.h
deleted file mode 100644
index 2fa705f..0000000
--- a/src/arch/arm64/include/bootblock_common.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#endif
-
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#else
-static void bootblock_mainboard_init(void)
-{
-}
-#endif
diff --git a/src/arch/mips/Kconfig b/src/arch/mips/Kconfig
index 622fc82..e41b058 100644
--- a/src/arch/mips/Kconfig
+++ b/src/arch/mips/Kconfig
@@ -26,6 +26,7 @@ config ARCH_BOOTBLOCK_MIPS
bool
default n
select ARCH_MIPS
+ select BOOTBLOCK_CUSTOM
config ARCH_VERSTAGE_MIPS
bool
diff --git a/src/arch/mips/bootblock_simple.c b/src/arch/mips/bootblock_simple.c
index 1a3c677..f90731e 100644
--- a/src/arch/mips/bootblock_simple.c
+++ b/src/arch/mips/bootblock_simple.c
@@ -18,7 +18,7 @@
* Foundation, Inc.
*/
-#include <bootblock_common.h>
+#include <arch/bootblock_common.h>
#include <console/console.h>
#include <halt.h>
#include <program_loading.h>
diff --git a/src/arch/mips/include/arch/bootblock_common.h b/src/arch/mips/include/arch/bootblock_common.h
new file mode 100644
index 0000000..4b2fd08
--- /dev/null
+++ b/src/arch/mips/include/arch/bootblock_common.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Imagination Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifdef CONFIG_BOOTBLOCK_CPU_INIT
+#include CONFIG_BOOTBLOCK_CPU_INIT
+#endif
+
+#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
+#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
+#else
+static void bootblock_mainboard_init(void)
+{
+}
+#endif
diff --git a/src/arch/mips/include/bootblock_common.h b/src/arch/mips/include/bootblock_common.h
deleted file mode 100644
index 4b2fd08..0000000
--- a/src/arch/mips/include/bootblock_common.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#endif
-
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#else
-static void bootblock_mainboard_init(void)
-{
-}
-#endif
diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig
index 9618c63..1849335 100644
--- a/src/arch/riscv/Kconfig
+++ b/src/arch/riscv/Kconfig
@@ -6,6 +6,7 @@ config ARCH_BOOTBLOCK_RISCV
bool
default n
select ARCH_RISCV
+ select BOOTBLOCK_CUSTOM
config ARCH_VERSTAGE_RISCV
bool
@@ -18,9 +19,3 @@ config ARCH_ROMSTAGE_RISCV
config ARCH_RAMSTAGE_RISCV
bool
default n
-
-# If a custom bootblock is necessary, this option should be "select"-ed by
-# the thing that needs it, probably the CPU.
-config RISCV_BOOTBLOCK_CUSTOM
- bool
- default n
diff --git a/src/arch/riscv/bootblock_simple.c b/src/arch/riscv/bootblock_simple.c
index a10cdaf..118755d 100644
--- a/src/arch/riscv/bootblock_simple.c
+++ b/src/arch/riscv/bootblock_simple.c
@@ -18,7 +18,6 @@
* Foundation, Inc.
*/
-#include <bootblock_common.h>
#include <arch/cache.h>
#include <arch/hlt.h>
#include <arch/stages.h>
diff --git a/src/arch/riscv/include/bootblock_common.h b/src/arch/riscv/include/bootblock_common.h
deleted file mode 100644
index fe2c982..0000000
--- a/src/arch/riscv/include/bootblock_common.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#endif
-
-// I'm disappointed that we let this kind of thing creep in.
-// we null out functions with this kind of stuff, AND weak symbols,
-// AND empty cpp function defines. What's next? Ouija boards?
-#if 0
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#else
-static void bootblock_mainboard_init(void)
-{
-}
-#endif
-#endif
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 88b2592..738e7d1 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -24,6 +24,7 @@ config ARCH_BOOTBLOCK_X86_32
bool
default n
select ARCH_X86
+ select BOOTBLOCK_CUSTOM
config ARCH_VERSTAGE_X86_32
bool
@@ -43,6 +44,7 @@ config ARCH_BOOTBLOCK_X86_64
bool
default n
select ARCH_X86
+ select BOOTBLOCK_CUSTOM
config ARCH_VERSTAGE_X86_64
bool
diff --git a/src/arch/x86/bootblock_normal.c b/src/arch/x86/bootblock_normal.c
index bde2535..19c7369 100644
--- a/src/arch/x86/bootblock_normal.c
+++ b/src/arch/x86/bootblock_normal.c
@@ -1,5 +1,5 @@
#include <smp/node.h>
-#include <bootblock_common.h>
+#include <arch/bootblock_common.h>
#include <pc80/mc146818rtc.h>
#include <halt.h>
diff --git a/src/arch/x86/bootblock_simple.c b/src/arch/x86/bootblock_simple.c
index bb0591f..4bff360 100644
--- a/src/arch/x86/bootblock_simple.c
+++ b/src/arch/x86/bootblock_simple.c
@@ -1,5 +1,5 @@
#include <smp/node.h>
-#include <bootblock_common.h>
+#include <arch/bootblock_common.h>
#include <halt.h>
static void main(unsigned long bist)
diff --git a/src/arch/x86/include/arch/bootblock_common.h b/src/arch/x86/include/arch/bootblock_common.h
new file mode 100644
index 0000000..939ba08
--- /dev/null
+++ b/src/arch/x86/include/arch/bootblock_common.h
@@ -0,0 +1,77 @@
+#include <arch/cbfs.h>
+#include <cpu/x86/lapic/boot_cpu.c>
+#include <pc80/mc146818rtc.h>
+
+#ifdef CONFIG_BOOTBLOCK_RESETS
+#include CONFIG_BOOTBLOCK_RESETS
+#endif
+
+#ifdef CONFIG_BOOTBLOCK_CPU_INIT
+#include CONFIG_BOOTBLOCK_CPU_INIT
+#endif
+#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+#endif
+#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+#endif
+
+#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
+#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
+#else
+static void bootblock_mainboard_init(void)
+{
+#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
+ bootblock_northbridge_init();
+#endif
+#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
+ bootblock_southbridge_init();
+#endif
+#ifdef CONFIG_BOOTBLOCK_CPU_INIT
+ bootblock_cpu_init();
+#endif
+}
+#endif
+
+#if CONFIG_USE_OPTION_TABLE
+static void sanitize_cmos(void)
+{
+ if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
+ unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default");
+ if (cmos_default) {
+ int i;
+ cmos_disable_rtc();
+ for (i = 14; i < 128; i++) {
+ cmos_write_inner(cmos_default[i], i);
+ }
+ cmos_enable_rtc();
+ }
+ }
+}
+#endif
+
+#if CONFIG_CMOS_POST
+static void cmos_post_init(void)
+{
+ u8 magic = CMOS_POST_BANK_0_MAGIC;
+
+ /* Switch to the other bank */
+ switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
+ case CMOS_POST_BANK_1_MAGIC:
+ break;
+ case CMOS_POST_BANK_0_MAGIC:
+ magic = CMOS_POST_BANK_1_MAGIC;
+ break;
+ default:
+ /* Initialize to zero */
+ cmos_write(0, CMOS_POST_BANK_0_OFFSET);
+ cmos_write(0, CMOS_POST_BANK_1_OFFSET);
+#if CONFIG_CMOS_POST_EXTRA
+ cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
+ cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
+#endif
+ }
+
+ cmos_write(magic, CMOS_POST_BANK_OFFSET);
+}
+#endif
diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h
deleted file mode 100644
index 939ba08..0000000
--- a/src/arch/x86/include/bootblock_common.h
+++ /dev/null
@@ -1,77 +0,0 @@
-#include <arch/cbfs.h>
-#include <cpu/x86/lapic/boot_cpu.c>
-#include <pc80/mc146818rtc.h>
-
-#ifdef CONFIG_BOOTBLOCK_RESETS
-#include CONFIG_BOOTBLOCK_RESETS
-#endif
-
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#endif
-#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
-#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
-#endif
-#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
-#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
-#endif
-
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#else
-static void bootblock_mainboard_init(void)
-{
-#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
- bootblock_northbridge_init();
-#endif
-#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
- bootblock_southbridge_init();
-#endif
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
- bootblock_cpu_init();
-#endif
-}
-#endif
-
-#if CONFIG_USE_OPTION_TABLE
-static void sanitize_cmos(void)
-{
- if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
- unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default");
- if (cmos_default) {
- int i;
- cmos_disable_rtc();
- for (i = 14; i < 128; i++) {
- cmos_write_inner(cmos_default[i], i);
- }
- cmos_enable_rtc();
- }
- }
-}
-#endif
-
-#if CONFIG_CMOS_POST
-static void cmos_post_init(void)
-{
- u8 magic = CMOS_POST_BANK_0_MAGIC;
-
- /* Switch to the other bank */
- switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
- case CMOS_POST_BANK_1_MAGIC:
- break;
- case CMOS_POST_BANK_0_MAGIC:
- magic = CMOS_POST_BANK_1_MAGIC;
- break;
- default:
- /* Initialize to zero */
- cmos_write(0, CMOS_POST_BANK_0_OFFSET);
- cmos_write(0, CMOS_POST_BANK_1_OFFSET);
-#if CONFIG_CMOS_POST_EXTRA
- cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
- cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
-#endif
- }
-
- cmos_write(magic, CMOS_POST_BANK_OFFSET);
-}
-#endif
diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h
new file mode 100644
index 0000000..504a0ac
--- /dev/null
+++ b/src/include/bootblock_common.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef __BOOTBLOCK_COMMON_H
+#define __BOOTBLOCK_COMMON_H
+
+/* These are defined as weak no-ops that can be overridden by mainboard/SoC. */
+void bootblock_mainboard_early_init(void);
+void bootblock_mainboard_init(void);
+void bootblock_soc_init(void);
+
+#endif /* __BOOTBLOCK_COMMON_H */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 44142fc..d641065 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -18,6 +18,11 @@
#
subdirs-y += loaders
+
+ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
+bootblock-y += bootblock.c
+endif
+
bootblock-y += assets.c
bootblock-y += prog_loaders.c
bootblock-y += prog_ops.c
@@ -27,7 +32,6 @@ bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
bootblock-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
bootblock-y += libgcc.c
bootblock-$(CONFIG_GENERIC_UDELAY) += timer.c
-
bootblock-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
bootblock-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
bootblock-$(CONFIG_I2C_TPM) += delay.c
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
new file mode 100644
index 0000000..a5c5382
--- /dev/null
+++ b/src/lib/bootblock.c
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2010 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <arch/exception.h>
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <delay.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+__attribute__((weak)) void bootblock_mainboard_early_init(void) { /* no-op */ }
+__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
+__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
+
+void main(void)
+{
+ init_timer();
+ if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION))
+ timestamp_init(timestamp_get());
+
+ bootblock_mainboard_early_init();
+
+ if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) {
+ console_init();
+ exception_init();
+ }
+
+ bootblock_soc_init();
+ bootblock_mainboard_init();
+
+ run_romstage();
+}
diff --git a/src/soc/broadcom/cygnus/Kconfig b/src/soc/broadcom/cygnus/Kconfig
index 75df786..93d287a 100644
--- a/src/soc/broadcom/cygnus/Kconfig
+++ b/src/soc/broadcom/cygnus/Kconfig
@@ -37,10 +37,6 @@ config CHROMEOS
select SEPARATE_VERSTAGE
select RETURN_FROM_VERSTAGE
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/broadcom/cygnus/bootblock.c"
-
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on DRIVERS_UART
diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
index 45a2abb..b687dbc 100644
--- a/src/soc/marvell/bg4cd/Kconfig
+++ b/src/soc/marvell/bg4cd/Kconfig
@@ -21,10 +21,10 @@ config SOC_MARVELL_BG4CD
bool
default n
select ARCH_BOOTBLOCK_ARMV7_M
+ select BOOTBLOCK_CUSTOM if VBOOT_VERIFY_FIRMWARE
select ARCH_RAMSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_VERSTAGE_ARMV7_M
- select ARM_BOOTBLOCK_CUSTOM if VBOOT_VERIFY_FIRMWARE
select BOOTBLOCK_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
@@ -35,8 +35,4 @@ if SOC_MARVELL_BG4CD
config CHROMEOS
select VBOOT_STARTS_IN_BOOTBLOCK
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/marvell/bg4cd/bootblock.c"
-
endif
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index c35e2c2..bd38d76 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -2,6 +2,7 @@ config SOC_NVIDIA_TEGRA124
bool
default n
select ARCH_BOOTBLOCK_ARMV4
+ select BOOTBLOCK_CUSTOM
select ARCH_VERSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_RAMSTAGE_ARMV7
@@ -10,20 +11,11 @@ config SOC_NVIDIA_TEGRA124
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select BOOTBLOCK_CONSOLE
- select ARM_BOOTBLOCK_CUSTOM
select ARM_LPAE
select GENERIC_GPIO_LIB
if SOC_NVIDIA_TEGRA124
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/nvidia/tegra124/bootblock.c"
- help
- CPU/SoC-specific bootblock code. This is useful if the
- bootblock must load microcode or copy data from ROM before
- searching for the bootblock.
-
config TEGRA124_MODEL_TD570D
bool "TD570D"
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index cb6798c..4be9a4c 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -2,6 +2,7 @@ config SOC_NVIDIA_TEGRA132
bool
default n
select ARCH_BOOTBLOCK_ARMV4
+ select BOOTBLOCK_CUSTOM
select ARCH_VERSTAGE_ARMV4
select ARCH_ROMSTAGE_ARMV4
select ARCH_RAMSTAGE_ARMV8_64
@@ -11,7 +12,6 @@ config SOC_NVIDIA_TEGRA132
select GENERIC_UDELAY
select HAVE_HARD_RESET
select HAVE_UART_SPECIAL
- select ARM_BOOTBLOCK_CUSTOM
select GENERIC_GPIO_LIB
select HAS_PRECBMEM_TIMESTAMP_REGION
@@ -31,14 +31,6 @@ config MAINBOARD_DO_SOR_INIT
help
Initialize dp display
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/nvidia/tegra132/bootblock.c"
- help
- CPU/SoC-specific bootblock code. This is useful if the
- bootblock must load microcode or copy data from ROM before
- searching for the bootblock.
-
config MAX_CPUS
int
default 2
diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig
index 2d910be..e70cdc6 100644
--- a/src/soc/nvidia/tegra210/Kconfig
+++ b/src/soc/nvidia/tegra210/Kconfig
@@ -2,6 +2,7 @@ config SOC_NVIDIA_TEGRA210
bool
default n
select ARCH_BOOTBLOCK_ARMV4
+ select BOOTBLOCK_CUSTOM
select ARCH_VERSTAGE_ARMV4
select ARCH_ROMSTAGE_ARMV4
select ARCH_RAMSTAGE_ARMV8_64
@@ -12,7 +13,6 @@ config SOC_NVIDIA_TEGRA210
select GENERIC_UDELAY
select HAVE_HARD_RESET
select HAVE_UART_SPECIAL
- select ARM_BOOTBLOCK_CUSTOM
select ARM64_USE_ARM_TRUSTED_FIRMWARE
select HAS_PRECBMEM_TIMESTAMP_REGION
select GENERIC_GPIO_LIB
@@ -36,14 +36,6 @@ config MAINBOARD_DO_SOR_INIT
help
Initialize dp display
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/nvidia/tegra210/bootblock.c"
- help
- CPU/SoC-specific bootblock code. This is useful if the
- bootblock must load microcode or copy data from ROM before
- searching for the bootblock.
-
config MAX_CPUS
int
default 4
diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig
index bc484e3..2d3aa0b 100644
--- a/src/soc/rockchip/rk3288/Kconfig
+++ b/src/soc/rockchip/rk3288/Kconfig
@@ -40,10 +40,6 @@ config CHROMEOS
select SEPARATE_VERSTAGE
select RETURN_FROM_VERSTAGE
-config BOOTBLOCK_CPU_INIT
- string
- default "soc/rockchip/rk3288/bootblock.c"
-
config PMIC_BUS
int
default -1
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