[coreboot-gerrit] Patch set updated for coreboot: MAINTAINERS: Intel is designating maintainers for FSP 1.0 and FSP 1.1

[Leroy P Leahy (leroy.p.leahy@intel.com)]

Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11894

-gerrit

commit a7626be0f5216fca61a0a4d4d7dfa9ab4ac707fa
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Tue Oct 13 17:30:04 2015 -0700

    MAINTAINERS: Intel is designating maintainers for FSP 1.0 and FSP 1.1
    
    After several internal discussions, teams at Intel with stakes in
    coreboot have decided to each assign one or more maintainers. These
    maintainers can be expected to provide a point of contact for
    assistance with technial (code-related) issues, testing on real
    hardware, and making sure that their FSP-related areas continue to
    function with upstream coreboot.
    
    They understand that the inclusion of their information in the
    MAINTANERS file does not give them any extra power over their areas.
    At the same time, nobody expects any community process to change.
    The one expectation is that reasonable efforts be made to contact
    these maintainers when making fundamental changes to their areas, or
    when discussing code removal.
    
    Change-Id: I62b2eaec8270ac1fce5bfbee3b3da68aba116b0f
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 MAINTAINERS | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index bd49c41..2c5af93 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -147,6 +147,39 @@ F:	*.inc
 F:	util/kconfig
 F:	util/sconfig
 
+FSP 1.0 INTEGRATION
+M:	Huang Jin <huang.jin at intel.com>
+M:	York Yang <york.yang at intel.com>
+S:	Supported
+F:	src/drivers/intel/fsp1_0
+
+FSP 1.0 BAYTRAIL
+M:	Huang Jin <huang.jin at intel.com>
+M:	York Yang <york.yang at intel.com>
+S:	Supported
+F:	src/northbridge/intel/fsp_baytrail
+F:	src/soc/intel/fsp_baytrail
+F:	src/southbridge/intel/fsp_rangeley
+F:	src/mainboard/intel/bakersport_fsp
+F:	src/mainboard/intel/bayleybay_fsp
+F:	src/mainboard/intel/minnowmax
+
+FSP 1.0 RANGELEY
+M:	David Guckian <david.guckian at intel.com>
+M:	Fei Wang <fei.z.wang at intel.com>
+S:	Supported
+F:	src/cpu/intel/fsp_model_406dx
+F:	src/southbridge/intel/fsp_rangeley
+F:	src/mainboard/intel/mohonpeak
+
+FSP 1.1 INTEGRATION
+M:	Lee Leahy <leroy.p.leahy at intel.com>
+M:	Andrey Petrov <andrey.petrov at intel.com>
+M:	Huang Jin <huang.jin at intel.com>
+M:	York Yang <york.yang at intel.com>
+S:	Supported
+F:	src/drivers/intel/fsp1_1
+
 THE REST
 M:	Stefan Reinauer <stefan.reinauer at coreboot.org>
 L:	coreboot at coreboot.org