[coreboot-gerrit] Patch merged into coreboot/master: pcengines/apu1: Fix SPD for 4GB model

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit c82ab0adf568cab2e899e34715e1d07a37ff3ebe
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Oct 14 16:03:56 2015 +0300

    pcengines/apu1: Fix SPD for 4GB model
    
    Value of tRFCmin was incorrectly using 2 Gigabit chip data.
    There was no observed instability or bug reports because of this.
    
    Change-Id: Ifa03b883afa5a304dd20caf3d4d0383c6cfebdb8
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/11899
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/11899 for details.

-gerrit