[coreboot-gerrit] Patch merged into coreboot/master: x86: add standalone verstage support
gerrit at coreboot.org
gerrit at coreboot.org
Wed Oct 14 19:07:55 CEST 2015
the following patch was just integrated into master:
commit 75c51d9af15dfc599adaf7a8f6e892d452146f9c
Author: Aaron Durbin <adurbin at chromium.org>
Date: Tue Sep 29 16:31:20 2015 -0500
x86: add standalone verstage support
To support x86 verstage one needs a working buffer for
vboot. That buffer resides in the cache-as-ram region
which persists across verstage and romstage. The current
assumption is that verstage brings cache-as-ram up
and romstage tears cache-as-ram down. The timestamp,
cbmem console, and the vboot work buffer are persistent
through in both romstage and verstage. The vboot
work buffer as well as the cbmem console are permanently
destroyed once cache-as-ram is torn down. The timestamp
region is migrated. When verstage is enabled the assumption
is that _start is the romstage entry point. It's currently
expected that the chipset provides the entry point to
romstage when verstage is employed. Also, the car_var_*()
APIs use direct access when in verstage since its expected
verstage does not tear down cache-as-ram. Lastly, supporting
files were added to verstage-y such that an x86 verstage
will build and link.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built and booted glados using separate verstage.
Change-Id: I097aa0b92f3bb95275205a3fd8b21362c67b97aa
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/11822
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
See http://review.coreboot.org/11822 for details.
-gerrit
More information about the coreboot-gerrit
mailing list