[coreboot-gerrit] Patch merged into coreboot/master: Skylake: remove the out-dated VR config and un-needed 24mhz calibration
gerrit at coreboot.org
gerrit at coreboot.org
Mon Oct 12 01:55:23 CEST 2015
the following patch was just integrated into master:
commit 951f2d3ebb391bf4b08cb0073c96689fa453a94d
Author: robbie zhang <robbie.zhang at intel.com>
Date: Mon Sep 21 16:22:41 2015 -0700
Skylake: remove the out-dated VR config and un-needed 24mhz calibration
On Skylake, mailbox interface is used to configure VRs, dropping direct msr
writing. With current fsp, svid/vr programming seems to be functional - no
errors are given in the svid transactions in boot, and hw engineer verified
the VRs on Kunimitsu. Additional tunnings might be needed later with power
testing.
24mhz calibration is no longer needed on Skylake due to bclk archtecture
change.
BRANCH=none
BUG=chrome-os-partner:45387
TEST=Built and boot on kunimitsu/glados, reboot, S3/resume verified.
Signed-off-by: robbie zhang <robbie.zhang at intel.com>
Original-Change-Id: If99b5758fcdba8604139c761a07403d4a5d2eb4c
Original-Reviewed-on: https://chromium-review.googlesource.com/301470
Original-Commit-Ready: Robbie Zhang <robbie.zhang at intel.com>
Original-Tested-by: Robbie Zhang <robbie.zhang at intel.com>
Original-Tested-by: Wenkai Du <wenkai.du at intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Change-Id: I98acf78aac9c705614fb200f8c3313a89296fbf2
Signed-off-by: robbie zhang <robbie.zhang at intel.com>
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/11811
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi at google.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
See http://review.coreboot.org/11811 for details.
-gerrit
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