[coreboot-gerrit] New patch to review for coreboot: intel/i82801gx: Reorder spaces in output

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Sun Oct 11 16:22:39 CEST 2015


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11870

-gerrit

commit f815d6b782c91aa73602cc3d6989de5f37706b36
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Sun Oct 11 15:48:36 2015 +0200

    intel/i82801gx: Reorder spaces in output
    
    Currently, the coreboot log of a Lenovo X60, not having any IDE devices
    connected, there is a trailing whitespace in the output.
    
    	[…]
    	PCI: 00:1f.1 init ...
    	i82801gx_ide: initializing...
    	PCI: 00:1f.1 init finished in 11 usecs
    	[…]
    
    Reorder the whitespaces, so they are added when needed.
    
    Change-Id: I640e514c89fe0246a847d1fd088def1c88e864f8
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/southbridge/intel/i82801gx/ide.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index 1b927ec..9aff890 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -35,7 +35,7 @@ static void ide_init(struct device *dev)
 	/* Get the chip configuration */
 	config_t *config = dev->chip_info;
 
-	printk(BIOS_DEBUG, "i82801gx_ide: initializing... ");
+	printk(BIOS_DEBUG, "i82801gx_ide: initializing...");
 	if (config == NULL) {
 		printk(BIOS_ERR, "\ni82801gx_ide: Not mentioned in devicetree.cb!\n");
 		// Trying to set somewhat safe defaults instead of bailing out.
@@ -61,7 +61,7 @@ static void ide_init(struct device *dev)
 		ideTimingConfig |= (3 << 8); // RCT = 1 clock
 		ideTimingConfig |= (1 << 1); // IE0
 		ideTimingConfig |= (1 << 0); // TIME0
-		printk(BIOS_DEBUG, "IDE0 ");
+		printk(BIOS_DEBUG, " IDE0");
 	}
 	pci_write_config16(dev, IDE_TIM_PRI, ideTimingConfig);
 
@@ -75,7 +75,7 @@ static void ide_init(struct device *dev)
 		ideTimingConfig |= (3 << 8); // RCT = 1 clock
 		ideTimingConfig |= (1 << 1); // IE0
 		ideTimingConfig |= (1 << 0); // TIME0
-		printk(BIOS_DEBUG, "IDE1 ");
+		printk(BIOS_DEBUG, " IDE1");
 	}
 	pci_write_config16(dev, IDE_TIM_SEC, ideTimingConfig);
 



More information about the coreboot-gerrit mailing list