[coreboot-gerrit] Patch set updated for coreboot: inteltool: Add function to generate SPD dump.

Vladimir Serbinenko (phcoder@gmail.com) gerrit at coreboot.org
Sun Oct 11 12:08:46 CEST 2015


Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11847

-gerrit

commit 90bb269d3404c966d494d45de29add682d6f6ad9
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Oct 10 13:20:32 2015 +0200

    inteltool: Add function to generate SPD dump.
    
    Change-Id: If165475ed3e1f3262a8926ef619128d25b1e2896
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 util/inteltool/inteltool.c  | 11 +++++++++--
 util/inteltool/inteltool.h  |  4 ++--
 util/inteltool/ivy_memory.c | 29 ++++++++++++++++++++++++++++-
 util/inteltool/memory.c     |  4 ++--
 4 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 508b55a..f91b3ad 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -228,6 +228,7 @@ void print_usage(const char *name)
 	     "   -r | --rcba:                      dump southbridge RCBA registers\n"
 	     "   -p | --pmbase:                    dump southbridge Power Management registers\n\n"
 	     "   -m | --mchbar:                    dump northbridge Memory Controller registers\n"
+	     "   -S FILE | --spd=FILE:             generate spd.bin equivalent to current timings\n"
 	     "   -e | --epbar:                     dump northbridge EPBAR registers\n"
 	     "   -d | --dmibar:                    dump northbridge DMIBAR registers\n"
 	     "   -P | --pciexpress:                dump northbridge PCIEXBAR registers\n\n"
@@ -242,6 +243,7 @@ int main(int argc, char *argv[])
 {
 	struct pci_access *pacc;
 	struct pci_dev *sb = NULL, *nb, *gfx = NULL, *dev;
+	const char *dump_spd_file = 0;
 	int i, opt, option_index = 0;
 	unsigned int id;
 
@@ -267,18 +269,23 @@ int main(int argc, char *argv[])
 		{"msrs", 0, 0, 'M'},
 		{"ambs", 0, 0, 'A'},
 		{"spi", 0, 0, 's'},
+		{"spd", 0, 0, 'S'},
 		{"all", 0, 0, 'a'},
 		{"gfx", 0, 0, 'f'},
 		{0, 0, 0, 0}
 	};
 
-	while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaAsf",
+	while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaAsfS:",
                                   long_options, &option_index)) != EOF) {
 		switch (opt) {
 		case 'v':
 			print_version();
 			exit(0);
 			break;
+		case 'S':
+			dump_spd_file = optarg;
+			dump_mchbar = 1;
+			break;
 		case 'g':
 			dump_gpios = 1;
 			break;
@@ -467,7 +474,7 @@ int main(int argc, char *argv[])
 	}
 
 	if (dump_mchbar) {
-		print_mchbar(nb, pacc);
+		print_mchbar(nb, pacc, dump_spd_file);
 		printf("\n\n");
 	}
 
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h
index cff0fd9..dffe204 100644
--- a/util/inteltool/inteltool.h
+++ b/util/inteltool/inteltool.h
@@ -204,7 +204,7 @@ void unmap_physical(void *virt_addr, size_t len);
 
 unsigned int cpuid(unsigned int op);
 int print_intel_core_msrs(void);
-int print_mchbar(struct pci_dev *nb, struct pci_access *pacc);
+int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_spd_file);
 int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
 int print_rcba(struct pci_dev *sb);
 int print_gpios(struct pci_dev *sb, int show_all, int show_diffs);
@@ -214,4 +214,4 @@ int print_pciexbar(struct pci_dev *nb);
 int print_ambs(struct pci_dev *nb, struct pci_access *pacc);
 int print_spi(struct pci_dev *sb);
 int print_gfx(struct pci_dev *gfx);
-void ivybridge_dump_timings(void);
+void ivybridge_dump_timings(const char *dump_spd_file);
diff --git a/util/inteltool/ivy_memory.c b/util/inteltool/ivy_memory.c
index ba59b51..98eef41 100644
--- a/util/inteltool/ivy_memory.c
+++ b/util/inteltool/ivy_memory.c
@@ -19,6 +19,7 @@
 #include <stdlib.h>
 #include <string.h>
 #include <inttypes.h>
+#include <errno.h>
 #include "inteltool.h"
 
 extern volatile uint8_t *mchbar;
@@ -69,7 +70,7 @@ static u16 spd_ddr3_calc_crc(u8 * spd)
 	return crc;
 }
 
-void ivybridge_dump_timings(void)
+void ivybridge_dump_timings(const char *dump_spd_file)
 {
 	u32 mr0[2];
 	u32 mr1[2];
@@ -362,8 +363,20 @@ void ivybridge_dump_timings(void)
 
 	printf("/* SPD matching current mode:  */\n");
 
+	FILE *dump_spd = 0;
+
+	if (dump_spd_file) {
+		dump_spd = fopen (dump_spd_file, "wb");
+		if (!dump_spd) {
+			fprintf (stderr, "Couldn't open file %s: %s\n", dump_spd_file,
+				 strerror (errno));
+			exit (1);
+		}
+	}
+
 	for (channel = 0; channel < 2; channel++)
 		for (slot = 0; slot < 2; slot++)
+		{
 			if (slots[channel][slot].size_mb) {
 				int i;
 
@@ -377,6 +390,20 @@ void ivybridge_dump_timings(void)
 						printf("\n");
 				}
 				printf("\n");
+
+				if (dump_spd) {
+					fwrite(spd[channel][slot], 1, 256, dump_spd);
+				}
+			} else {
+				if (dump_spd) {
+					char zero[256];
+					memset (zero, 0, 256);
+					fwrite(zero, 1, 256, dump_spd);
+				}
 			}
+		}
+	if (dump_spd) {
+		fclose (dump_spd);
+	}
 
 }
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 313de5a..aacaf96 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -111,7 +111,7 @@ static void dump_timings (void)
 /*
  * (G)MCH MMIO Config Space
  */
-int print_mchbar(struct pci_dev *nb, struct pci_access *pacc)
+int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_spd_file)
 {
 	int i, size = (16 * 1024);
 	uint64_t mchbar_phys;
@@ -265,7 +265,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc)
 	case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_M:
 	case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_E3:
 	case PCI_DEVICE_ID_INTEL_CORE_3RD_GEN_015c:
-		ivybridge_dump_timings();
+		ivybridge_dump_timings(dump_spd_file);
 		break;
 	}
 	unmap_physical((void *)mchbar, size);



More information about the coreboot-gerrit mailing list