[coreboot-gerrit] New patch to review for coreboot: WIP: lib/gpio: Remove layering violation dependency on soc/gpio.h

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Fri Oct 9 06:01:59 CEST 2015


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11834

-gerrit

commit 03416131ff9fe03f51087474bf7c20d373d846c9
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Thu Oct 8 21:01:20 2015 -0700

    WIP: lib/gpio: Remove layering violation dependency on soc/gpio.h
    
    Change-Id: I9bc19e11e9ad1b8da883ff15eb40fa364faa4fcc
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/include/gpio.h                          | 10 +++++++---
 src/soc/broadcom/cygnus/include/soc/gpio.h  |  4 +---
 src/soc/imgtec/pistachio/include/soc/gpio.h |  2 +-
 src/soc/intel/skylake/include/soc/gpio.h    |  3 +--
 src/soc/marvell/bg4cd/include/soc/gpio.h    |  3 +--
 src/soc/nvidia/tegra/gpio.h                 |  3 +--
 src/soc/qualcomm/ipq806x/include/soc/gpio.h |  3 +--
 7 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/src/include/gpio.h b/src/include/gpio.h
index 8cbf6ad..69ab389 100644
--- a/src/include/gpio.h
+++ b/src/include/gpio.h
@@ -20,11 +20,15 @@
 #ifndef __SRC_INCLUDE_GPIO_H__
 #define __SRC_INCLUDE_GPIO_H__
 
-#include <soc/gpio.h>
 #include <types.h>
 
-/* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */
-_Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio");
+/*
+ * This is an opaque type that diferent implementations may use in different
+ * manners. How GPIO or PAD information is encoded in this field is up to the
+ * implementation, but the total size must be restricted to 32-bits. The 32-bit
+ * restriction is here, since this field gets added to the coreboot table.
+ */
+typedef uint32_t gpio_t;
 
 /* The following functions must be implemented by SoC/board code. */
 int gpio_get(gpio_t gpio);
diff --git a/src/soc/broadcom/cygnus/include/soc/gpio.h b/src/soc/broadcom/cygnus/include/soc/gpio.h
index 69f06ce..1b5a6d2 100644
--- a/src/soc/broadcom/cygnus/include/soc/gpio.h
+++ b/src/soc/broadcom/cygnus/include/soc/gpio.h
@@ -14,6 +14,7 @@
 #ifndef __SOC_BROADCOM_CYGNUS_GPIO_H__
 #define __SOC_BROADCOM_CYGNUS_GPIO_H__
 
+#include <gpio.h>
 #include <types.h>
 
 #define ENOTSUPP	524	/* Operation is not supported */
@@ -25,9 +26,6 @@ enum iproc_gpio_types {
 	IPROC_GPIO_ASIU_ID
 };
 
-typedef u32 gpio_t;
-
-
 void *cygnus_pinmux_init(void);
 int cygnus_gpio_request_enable(void *priv, unsigned pin);
 void cygnus_gpio_disable_free(void *priv, unsigned pin);
diff --git a/src/soc/imgtec/pistachio/include/soc/gpio.h b/src/soc/imgtec/pistachio/include/soc/gpio.h
index 2633711..9d22f3a 100644
--- a/src/soc/imgtec/pistachio/include/soc/gpio.h
+++ b/src/soc/imgtec/pistachio/include/soc/gpio.h
@@ -20,6 +20,6 @@
 #ifndef __SOC_IMGTECH_PISTACHIO_GPIO_H__
 #define __SOC_IMGTECH_PISTACHIO_GPIO_H__
 
-typedef unsigned gpio_t;
+#include <gpio.h>
 
 #endif // __SOC_IMGTECH_PISTACHIO_GPIO_H__
diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h
index 84d2a70..11e22eb 100644
--- a/src/soc/intel/skylake/include/soc/gpio.h
+++ b/src/soc/intel/skylake/include/soc/gpio.h
@@ -24,11 +24,10 @@
 #include <soc/gpio_defs.h>
 
 #ifndef __ACPI__
+#include <gpio.h>
 #include <stdint.h>
 #include <stddef.h>
 
-typedef uint32_t gpio_t;
-
 /* Structure to represent GPI status for GPE and SMI. Use helper
  * functions for interrogating particular GPIs. */
 struct gpi_status {
diff --git a/src/soc/marvell/bg4cd/include/soc/gpio.h b/src/soc/marvell/bg4cd/include/soc/gpio.h
index 86882c7..fcb5d8b 100644
--- a/src/soc/marvell/bg4cd/include/soc/gpio.h
+++ b/src/soc/marvell/bg4cd/include/soc/gpio.h
@@ -1,8 +1,7 @@
 #ifndef __SOC_MARVELL_BG4CD_GPIO_H__
 #define __SOC_MARVELL_BG4CD_GPIO_H__
 
+#include <gpio.h>
 #include <types.h>
 
-typedef u32 gpio_t;
-
 #endif	/* __SOC_MARVELL_BG4CD_GPIO_H__ */
diff --git a/src/soc/nvidia/tegra/gpio.h b/src/soc/nvidia/tegra/gpio.h
index 728a597..a5722e3 100644
--- a/src/soc/nvidia/tegra/gpio.h
+++ b/src/soc/nvidia/tegra/gpio.h
@@ -20,12 +20,11 @@
 #ifndef __SOC_NVIDIA_TEGRA_GPIO_H__
 #define __SOC_NVIDIA_TEGRA_GPIO_H__
 
+#include <gpio.h>
 #include <stdint.h>
 
 #include "pinmux.h"
 
-typedef u32 gpio_t;
-
 #define GPIO_PINMUX_SHIFT 16
 #define GPIO(name) ((gpio_t)(GPIO_##name##_INDEX | \
 			     (PINMUX_GPIO_##name << GPIO_PINMUX_SHIFT)))
diff --git a/src/soc/qualcomm/ipq806x/include/soc/gpio.h b/src/soc/qualcomm/ipq806x/include/soc/gpio.h
index 3542991..419a859 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/gpio.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/gpio.h
@@ -33,6 +33,7 @@
 #ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_
 #define __SOC_QUALCOMM_IPQ806X_GPIO_H_
 
+#include <gpio.h>
 #include <types.h>
 
 #define GPIO_FUNC_ENABLE			1
@@ -90,8 +91,6 @@
 #define GPIO_IO_IN_SHIFT      0
 #define GPIO_IO_OUT_SHIFT     1
 
-typedef u32 gpio_t;
-
 void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
 			  unsigned int pull, unsigned int drvstr,
 			  unsigned int enable);



More information about the coreboot-gerrit mailing list