[coreboot-gerrit] Patch merged into coreboot/master: fsp1_0: Fix broken logic when searching for FSP

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8a75d82fa5b3abb2473f207554454d9517ca5acb
Author: Werner Zeh <werner.zeh at siemens.com>
Date:   Wed Oct 7 13:34:39 2015 +0200

    fsp1_0: Fix broken logic when searching for FSP
    
    Commit 47818b4d6017b89e398cfbc86e3c437e0f81cfdf
    (fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO)
    breaks the logic which decides whether FSP
    could be found or not in cache_as_ram.inc.
    Fix the error by inverting the logic of the test.
    
    TEST=Bootet mc_tcu3 board
    
    Change-Id: I993d3422ac406d204a53e4dc890210fb9a52469d
    Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
    Reviewed-on: http://review.coreboot.org/11806
    Tested-by: build bot (Jenkins)
    Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>


See http://review.coreboot.org/11806 for details.

-gerrit