[coreboot-gerrit] New patch to review for coreboot: google/veyron_mickey: Update LPDDR3 configuration

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12484

-gerrit

commit 2d4372d5096074da0d5955620ea5bbbbb1618fa0
Author: jiazi Yang <Tomato_Yang at asus.com>
Date:   Mon Nov 9 14:07:31 2015 +0800

    google/veyron_mickey: Update LPDDR3 configuration
    
    This makes the same changes to the LPDDR3 configuration that
    were made for Samsung modules:
    - Enable ODT function
    - Change DS to 40  from 34.3
    
    BUG=chrome-os-partner:47416
    BRANCH=firmware-veyron-6588.B
    TEST=Boot on mickey elpida board
    
    Change-Id: If8c729188803dd854dbbe80539fb228636b5eb9f
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: b3eb8bc31b9727b67a6b53b4370315010d9d6379
    Original-Change-Id: I2d54d3087ecd3536469866f30e4eb2d8b1acd5c1
    Original-Signed-off-by: jiazi Yang <Tomato_Yang at asus.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/311153
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/311855
    Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
    Original-Tested-by: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 .../google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc       | 5 +++--
 .../google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc       | 5 +++--
 .../google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc        | 5 +++--
 .../google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc        | 5 +++--
 .../google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc      | 5 +++--
 5 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc
index ef82b27..cb92d34 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc
@@ -65,7 +65,8 @@
 		.mr[0] = 0x0,
 		.mr[1] = 0xC3,
 		.mr[2] = 0x6,
-		.mr[3] = 0x1
+		/* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
 	},
 	.noc_timing = 0x20D266A4,
 	.noc_activate = 0x5B6,
@@ -74,5 +75,5 @@
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 9,
-	.odt = 0
+	.odt = 1
 },
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc
index e071646..c2293d5 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc
@@ -65,7 +65,8 @@
 		.mr[0] = 0x0,
 		.mr[1] = 0xC3,
 		.mr[2] = 0x6,
-		.mr[3] = 0x1
+                /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
 	},
 	.noc_timing = 0x20D266A4,
 	.noc_activate = 0x5B6,
@@ -74,5 +75,5 @@
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 13,
-	.odt = 0
+	.odt = 1
 },
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
index 00dc549..8573652 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc
@@ -65,7 +65,8 @@
 		.mr[0] = 0x0,
 		.mr[1] = 0xC3,
 		.mr[2] = 0x6,
-		.mr[3] = 0x1
+                /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
 	},
 	.noc_timing = 0x20D266A4,
 	.noc_activate = 0x5B6,
@@ -74,5 +75,5 @@
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 9,
-	.odt = 0,
+	.odt = 1,
 },
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc
index a48ac42..57dca32 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc
@@ -64,7 +64,8 @@
 		.mr[0] = 0x0,
 		.mr[1] = 0xC3,
 		.mr[2] = 0x6,
-		.mr[3] = 0x1
+                /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
 	},
 	.noc_timing = 0x20D266A4,
 	.noc_activate = 0x5B6,
@@ -73,5 +74,5 @@
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 13,
-	.odt = 0,
+	.odt = 1,
 },
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc
index 09d260b..c3e8fe4 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc
@@ -64,7 +64,8 @@
 		.mr[0] = 0x0,
 		.mr[1] = 0xC3,
 		.mr[2] = 0x6,
-		.mr[3] = 0x1
+                /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+		.mr[3] = 0x2
 	},
 	.noc_timing = 0x20D266A4,
 	.noc_activate = 0x5B6,
@@ -73,5 +74,5 @@
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 13,
-	.odt = 0,
+	.odt = 1,
 },