[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge: Fix PEG disablement
Nico Huber (nico.h@gmx.de)
gerrit at coreboot.org
Wed Nov 18 15:10:41 CET 2015
Nico Huber (nico.h at gmx.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12456
-gerrit
commit fa225ff918be9229212a5056085f57b14d904ef7
Author: Patrick Rudolph <siro at das-labor.org>
Date: Wed Oct 21 18:05:01 2015 +0200
nb/intel/sandybridge: Fix PEG disablement
Fix regression introduced by:
3660c0fc658e4e20ef079f762dfc7ad05c83544c
"northbridge/intel/sandybridge: Enable PEG clock-gating on demand"
Issue observed:
GNU/Linux kernel crashes in earlyinit on systems without PEG devices.
The crash occurs on every boot in different functions.
There's no problem on systems with PEG enabled.
Test system:
* Lenovo T530
* Intel Core i5-3320M CPU
* Fedora GNU/Linux 4.1
* PEG disabled in devicetree
Problem description:
Tests shows that modifing PEG chicken bit or device enable bits
after setting BIOS_RESET_CPL causes random crashes in GNU/Linux.
Problem solution:
Disable PEG devices before setting BIOS_RESET_CPL.
Final testing results:
No more random kernel crashes.
Change-Id: I4a967c2d00d7d1e4426cf5abdd5f616c21557da7
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
Reviewed-on: http://review.coreboot.org/12112
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h at gmx.de>
(cherry picked from commit aad34cda4bc9c14ed10b00fe5da3f32233257913)
---
src/northbridge/intel/sandybridge/northbridge.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 76f03f3..ff6849e 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -431,6 +431,11 @@ static void northbridge_init(struct device *dev)
}
MCHBAR32(0x5f10) = bridge_type;
+ /* Turn off unused devices. Has to be done before
+ * setting BIOS_RESET_CPL.
+ */
+ disable_peg();
+
/*
* Set bit 0 of BIOS_RESET_CPL to indicate to the CPU
* that BIOS has initialized memory and power management
@@ -456,9 +461,6 @@ static void northbridge_init(struct device *dev)
/* Set here before graphics PM init */
MCHBAR32(0x5500) = 0x00100001;
-
- /* Turn off unused devices */
- disable_peg();
}
static void northbridge_enable(device_t dev)
More information about the coreboot-gerrit
mailing list