[coreboot-gerrit] Patch merged into coreboot/master: src/northbridge/amd/amdmct: Add option to override bad SPD checksum

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit f3b9fd32658a9a6788b87431464b84cda3c3c24b
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Thu Jun 11 16:14:15 2015 -0500

    src/northbridge/amd/amdmct: Add option to override bad SPD checksum
    
    Certain DIMMs, for example DIMMs on which the EEPROM has been modified
    by the end user, may not contain a valid SPD checksum.  While this is
    not a normal condition, it may be useful to allow a checksum override
    while memory timing parameters are being altered, e.g. in the course
    of overclocking or underclocking, or when recovering from a bad SPD
    write.
    
    This is an advanced level feature primarily useful for debugging
    and development.
    
    Change-Id: Ia743a13348d0a6e5e4dfffa04ed9582e0f7f3dad
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
    Reviewed-on: http://review.coreboot.org/11987
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>


See http://review.coreboot.org/11987 for details.

-gerrit