[coreboot-gerrit] New patch to review for coreboot: intel/skylake: ensure the RTC time is set

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12411

-gerrit

commit 0116ca31330506d8c4a3766b1798985075383587
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Nov 6 15:24:20 2015 -0600

    intel/skylake: ensure the RTC time is set
    
    In 2014 or so the RTC code was changed to assume the ALTCENTRY
    register (0x32) as always being utilized for creating an rtc_time.
    However, one needs to ensure it's set at least once otherwise
    the year field in rtc_time is not sane.
    
    In practice this doesn't matter unless somone wants to use the
    full year value. cmos_init() should do the same thing in the
    rtc fail case, but the machine I had never had that set correctly.
    
    BUG=chrome-os-partner:47388
    BRANCH=None
    TEST=Booted glados w/ 0xff ALTCENTRY value. New value is 0x20.
    
    Change-Id: I028f801c5d717a0018ed00df82c25b466d64670c
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 7d5be5bc697bef60a264ddc7f67755aa96088d36
    Original-Change-Id: I6e12a30c9e08d8c1002e4cef0f143f0f88009e92
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/311264
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/skylake/pmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index fb09589..a2d88aa 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -139,6 +139,9 @@ static void pch_rtc_init(void)
 		printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
 	}
 
+	/* Ensure the date is set including century byte. */
+	cmos_check_update_date();
+
 #if IS_ENABLED(CONFIG_CHROMEOS_VBNV_CMOS)
 	pch_cmos_init_preserve(rtc_failed);
 #else