[coreboot-gerrit] Patch merged into coreboot/master: cpu/amd/car: Add romstage BSP stack overrun detection

gerrit at coreboot.org gerrit at coreboot.org
Tue Nov 10 20:00:59 CET 2015


the following patch was just integrated into master:
commit 1f780994ebb7b89cf9e47e7bb9533395b8f4dad0
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Mon Jun 1 23:58:59 2015 -0500

    cpu/amd/car: Add romstage BSP stack overrun detection
    
    NOTE: This commit switches CacheBase in CAR to use the DCACHE_RAM_BASE
    Kconfig variable.  There should be no functional difference between
    the existing code and the new code, however hardware verfication is
    encouraged on lesser used architectures such as AMD Geode.
    
    Change-Id: Ia2e8f99be9df388e492a633c49df21ca1c57ba13
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
    Reviewed-on: http://review.coreboot.org/11970
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Tested-by: Raptor Engineering Automated Test Stand <noreply at raptorengineeringinc.com>
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>


See http://review.coreboot.org/11970 for details.

-gerrit



More information about the coreboot-gerrit mailing list